Chromium Code Reviews| Index: arch/arm/include/asm/arch-tegra2/nvbl_assembly.h |
| diff --git a/arch/arm/include/asm/arch-tegra2/nvbl_assembly.h b/arch/arm/include/asm/arch-tegra2/nvbl_assembly.h |
| new file mode 100755 |
| index 0000000000000000000000000000000000000000..e0ce62269a439c4f66a9f6676c8a70a7b45fdcfe |
| --- /dev/null |
| +++ b/arch/arm/include/asm/arch-tegra2/nvbl_assembly.h |
| @@ -0,0 +1,239 @@ |
| +/* |
| + * (C) Copyright 2010 |
| + * NVIDIA Corporation <www.nvidia.com> |
| + * |
| + * See file CREDITS for list of people who contributed to this |
| + * project. |
| + * |
| + * This program is free software; you can redistribute it and/or |
| + * modify it under the terms of the GNU General Public License as |
| + * published by the Free Software Foundation; either version 2 of |
| + * the License, or (at your option) any later version. |
| + * |
| + * This program is distributed in the hope that it will be useful, |
| + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| + * GNU General Public License for more details. |
| + * |
| + * You should have received a copy of the GNU General Public License |
| + * along with this program; if not, write to the Free Software |
| + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| + * MA 02111-1307 USA |
| + */ |
| + |
| +/** |
| + * @file |
| + * <b>NVIDIA Tegra Boot Loader API</b> |
| + */ |
| + |
| +#ifndef INCLUDED_NVBL_ASSEMBLY_H |
| +#define INCLUDED_NVBL_ASSEMBLY_H 1 |
| + |
| +/* For AP20, use ARM v7 instruction mnemonics if nonzero -- has no effect for AP15. |
| + * NOTE: Requires support in Microsoft assembler before this can be enabled. |
| + */ |
| +#if !defined(NVBL_USE_ARM_V7_MNEMONICS) |
| +#define NVBL_USE_ARM_V7_MNEMONICS 0 |
| +#endif |
| + |
| +/* For AP20, use ARM UAL instruction mnemonics if nonzero -- has no effect for AP15. |
| + * NOTE: Requires support in Microsoft assembler before this can be enabled. |
| + */ |
| +#if !defined(NVBL_USE_ARM_UAL_MNEMONICS) |
| +#define NVBL_USE_ARM_UAL_MNEMONICS 0 |
| +#endif |
| + |
| +/* For AP20, use ARM TrustZone support if nonzero -- has no effect for AP15. |
| + * NOTE: Requires support in Microsoft assembler before this can be enabled. |
| + */ |
| +#if !defined(NVBL_USE_ARM_TZ_SUPPORT) |
| +#define NVBL_USE_ARM_TZ_SUPPORT 0 |
| +#endif |
| + |
| +/* For AP20, use ARM MOV32 pseudo-op if nonzero -- has no effect for AP15. |
| + * NOTE: Requires support in Microsoft assembler before this can be enabled. |
| + */ |
| +#if !defined(NVBL_USE_ARM_MOV32_MNEMONIC) |
| +#define NVBL_USE_ARM_MOV32_MNEMONIC 0 |
| +#endif |
| + |
| + |
| +/** |
| + * @defgroup nvbl_assembly_group NvBL Assembly API |
| + * |
| + * |
| + * |
| + * @ingroup nvbl_group |
| + * @{ |
| + */ |
| + |
| +#if defined(ASSEMBLY_SOURCE_FILE) |
| +#ifndef INCLUDED_NVCOMMON_H |
| +/* OS-related #define's copied from nvcommon.h because nvcommon.h can't be |
| + * included here. |
| + */ |
| +#if defined(_WIN32) |
| + #define NVOS_IS_WINDOWS 1 |
|
Tom Warren
2010/11/12 00:12:40
Remove all references to Windows/WIN32 - this is U
yelin
2010/11/15 23:21:21
This file is gone.
|
| + #if defined(_WIN32_WCE) |
| + #define NVOS_IS_WINDOWS_CE 1 |
| + #endif |
| +#elif defined(__linux__) |
| + #define NVOS_IS_LINUX 1 |
| + #define NVOS_IS_UNIX 1 |
| +#elif defined(__arm__) && defined(__ARM_EABI__) |
| + /* GCC arm eabi compiler, potentially used for kernel compilation without |
| + * __linux__, but also for straight EABI (AOS) executable builds */ |
| +# if defined(__KERNEL__) |
| +# define NVOS_IS_LINUX 1 |
| +# define NVOS_IS_UNIX 1 |
| +# define NVOS_IS_LINUX_KERNEL 1 |
| +# endif |
| + /* Nothing to define for AOS */ |
| +#elif defined(__arm) |
| + /* For ARM RVDS compiler, we don't know the final target OS at compile time */ |
| +#else |
| + #error Unknown OS |
| +#endif |
| + |
| +#if !defined(NVOS_IS_WINDOWS) |
| +#define NVOS_IS_WINDOWS 0 |
| +#endif |
| +#if !defined(NVOS_IS_WINDOWS_CE) |
| +#define NVOS_IS_WINDOWS_CE 0 |
| +#endif |
| +#if !defined(NVOS_IS_LINUX) |
| +#define NVOS_IS_LINUX 0 |
| +#endif |
| +#if !defined(NVOS_IS_UNIX) |
| +#define NVOS_IS_UNIX 0 |
| +#endif |
| +#if !defined(NVOS_IS_LINUX_KERNEL) |
| +#define NVOS_IS_LINUX_KERNEL 0 |
| +#endif |
| +#endif /* !INCLUDED_NVCOMMON_H */ |
| + |
| +/* ----------------------------------------------------------------------------- |
| + * Assemblers don't like C-style constant suffix operators in spec-generated |
| + * headers. |
| + * ----------------------------------------------------------------------------- |
| + */ |
| +#undef _MK_ENUM_CONST |
| +#define _MK_ENUM_CONST(_constant_) (_constant_) |
| + |
| +/* ----------------------------------------------------------------------------- |
| + * Abstract assember operator because some ARM assemblers don't accept |
| + * the common ARM-defined assembler operators. They want their own operators. |
| + * ----------------------------------------------------------------------------- |
| + */ |
| + |
|
Tom Warren
2010/11/12 00:12:40
This crap shouldn't be needed with our ARM gcc/ar/
|
| +#if defined(__GNUC__) /* GNU compiler */ |
| +#define IMPORT .extern |
| +#define ALIGN .align |
| +#define EXPORT .globl |
| +#define AREA .section |
| +#define LABEL : |
| +#define END .end |
| +#define LTORG .ltorg |
| +#define SPACE .space |
| +#define DCD .word |
| +#define DCB .byte |
| +#define IF .if |
| +#define ENDIF .endif |
| +#define EQUATE(A,B) .EQU A, B |
| +#define TEXT .section .text |
| +#else |
| +#define LABEL |
| +#define EQUATE(A,B) (A) EQU (B) |
| +#define TEXT AREA |.text|,ALIGN=4,CODE,READONLY |
| +#endif |
| + |
| +/*----------------------------------------------------------------------------- |
| + * Abstract logical operations because some ARM assemblers don't |
| + * understand C operators. |
| + *----------------------------------------------------------------------------- |
| + */ |
| + |
| +#if !defined(_AND_) |
| +#if defined(_MSC_VER) |
| +#define _AND_ :AND: |
| +#else |
| +#define _AND_ & |
| +#endif |
| +#endif |
| + |
| +#if !defined(_OR_) |
| +#if defined(_MSC_VER) |
| +#define _OR_ :OR: |
| +#else |
| +#define _OR_ | |
| +#endif |
| +#endif |
| + |
| +#if !defined(_SHL_) |
| +#if defined(_MSC_VER) |
| +#define _SHL_ :SHL: |
| +#else |
| +#define _SHL_ << |
| +#endif |
| +#endif |
| + |
| +#if !defined(_SHR_) |
| +#if defined(_MSC_VER) |
| +#define _SHR_ :SHR: |
| +#else |
| +#define _SHR_ >> |
| +#endif |
| +#endif |
| + |
| +/*----------------------------------------------------------------------------- |
| + * Abstract debug build EXPORTs whose only purpose is to make symbols visible |
| + * to debuggers. |
| + *----------------------------------------------------------------------------- |
| + */ |
| + |
| +#if !defined(NV_DEBUG) |
| +#define NV_DEBUG 0 |
| +#define DEBUG_EXPORT(x) |
| +#elif NV_DEBUG |
| +#define DEBUG_EXPORT(x) EXPORT x |
| +#else |
| +#define DEBUG_EXPORT(x) |
| +#endif |
| + |
| +#if defined(_MSC_VER) || defined (__ARMCC_VERSION) /* Microsoft or RVDS compiler */ |
| + |
| + |
| +#if !NVBL_USE_ARM_V7_MNEMONICS |
| +#define CLREX DCD 0xF57FF01F /* Clear Exclusive */ |
| +#define DMB DCD 0xF57FF05F /* Data Memory Barrier */ |
| +#define DSB DCD 0xF57FF04F /* Data Synchronization Barrier */ |
| +#define ISB DCD 0xF57FF06F /* Instruction Synchronization Barrier */ |
| +#define POP LDMFD sp!, /* Pop */ |
| +#define PUSH STMFD sp!, /* Push */ |
| +#define SEVAL DCD 0xE320F004 /* Send Event Always */ |
| +#define SEV SEVAL /* Send Event */ |
| +#define VLDM FLDMIAD /* Vector Load Multiple (double precision only) */ |
| +#define VMRS FMRX /* Move VFP System Reg to General Purpose Reg */ |
| +#define VMSR FMXR /* Move General Purpose Reg to VFP System Reg */ |
| +#define VSTM FSTMIAD /* Vector Store Multiple (double precision only) */ |
| +#define WFEAL DCD 0xE320F002 /* Wait For Exception Always */ |
| +#define WFE WFEAL /* Wait For Exception */ |
| +#define WFIAL DCD 0xE320F003 /* Wait For Interrupt Always */ |
| +#define WFI WFIAL /* Wait For Exception */ |
| +#endif /* !NVBL_USE_ARM_V7_MNEMONICS */ |
| + |
| +#if !NVBL_USE_ARM_UAL_MNEMONICS |
| +#define ITTT ; /* If-Then-Then-Then instruction */ |
| +#define LDM LDMIA /* Load Multiple */ |
| +#define STM STMIA /* Store Multiple */ |
| +#define SUBSNE SUBNES /* Subtract if NE set condition codes */ |
| +#endif |
| + |
| +#endif /* defined(_MSC_VER) || defined(__ARMCC_VERSION) */ |
| + |
| +#endif /* defined(ASSEMBLY_SOURCE_FILE) */ |
| + |
| +/** @} */ |
| + |
| +#endif |
| + |