Chromium Code Reviews| Index: arch/arm/cpu/arm_cortexa9/tegra2/ap20.h |
| diff --git a/arch/arm/cpu/arm_cortexa9/tegra2/ap20.h b/arch/arm/cpu/arm_cortexa9/tegra2/ap20.h |
| index 132822a0b9f085f537736541a041ff915f3c6824..cbfc36e289f316075f9ccf4a1a6cfd260bb7daee 100644 |
| --- a/arch/arm/cpu/arm_cortexa9/tegra2/ap20.h |
| +++ b/arch/arm/cpu/arm_cortexa9/tegra2/ap20.h |
| @@ -31,6 +31,7 @@ |
| #include <asm/arch/nvbl_memmap_nvap.h> |
| #include <asm/arch/nvbl_arm_cpsr.h> |
| #include <asm/arch/nvbl_arm_cp15.h> |
| +#include <asm/arch/nvboot_sdram_param.h> |
| #define _AND_ & |
| @@ -45,6 +46,7 @@ |
| #define AHB_PA_BASE 0x6000C004 // Base address for arahb_arbc.h registers |
| #define EVP_PA_BASE 0x6000F000 // Base address for arevp.h registers |
| #define CSITE_PA_BASE 0x70040000 // Base address for arcsite.h registers |
| +#define ARM_PREF_BASE 0x50040000 |
| #define NV_PMC_REGR(pCar, reg) NV_READ32( (((NvUPtr)(pCar)) + APBDEV_PMC_##reg##_0)) |
| #define NV_PMC_REGW(pCar, reg, val) NV_WRITE32((((NvUPtr)(pCar)) + APBDEV_PMC_##reg##_0), (val)) |
| @@ -99,18 +101,10 @@ |
| #define SCU_CONTROL_0_SCU_ENABLE_RANGE 0:0 |
| #define SCU_INVALID_ALL_0 _MK_ADDR_CONST(0xc) |
| -#define ARM_PREF_BASE 0x50040000 |
| #define NV_SCU_REGR(reg) NV_READ32(ARM_PREF_BASE + SCU_##reg##_0) |
| #define NV_SCU_REGW(reg, val) NV_WRITE32((ARM_PREF_BASE + SCU_##reg##_0), (val)) |
| -//------------------------------------------------------------------------------ |
| -// Provide missing enumerators for spec files. |
| -//------------------------------------------------------------------------------ |
| - |
| -#define NV_BIT_ADDRESS 0x40000000 |
| -#define NV3P_SIGNATURE 0x5AFEADD8 |
| - |
|
Tom Warren
2010/11/12 00:12:40
Why were these removed in this changelist? If they
yelin
2010/11/15 23:21:21
Done.
|
| void NvBlStartCpu_AP20(NvU32 ResetVector); |
| void NvBlAvpHalt_AP20(void); |
| NV_NAKED void NvBlStartUpAvp_AP20( void ); |
| @@ -123,4 +117,5 @@ void cpu_init_crit(void); |
| void PostZz(void); |
| void PostYy(void); |
| void PostXx(void); |
| +void NvBlPrintU32(NvU32); |