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| 1 /* | 1 /* |
| 2 * (C) Copyright 2010 | 2 * (C) Copyright 2010 |
| 3 * NVIDIA Corporation <www.nvidia.com> | 3 * NVIDIA Corporation <www.nvidia.com> |
| 4 * | 4 * |
| 5 * See file CREDITS for list of people who contributed to this | 5 * See file CREDITS for list of people who contributed to this |
| 6 * project. | 6 * project. |
| 7 * | 7 * |
| 8 * This program is free software; you can redistribute it and/or | 8 * This program is free software; you can redistribute it and/or |
| 9 * modify it under the terms of the GNU General Public License as | 9 * modify it under the terms of the GNU General Public License as |
| 10 * published by the Free Software Foundation; either version 2 of | 10 * published by the Free Software Foundation; either version 2 of |
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| 31 #define CONFIG_TEGRA2_ENABLE_UARTD 1 | 31 #define CONFIG_TEGRA2_ENABLE_UARTD 1 |
| 32 | 32 |
| 33 /* UARTD: keyboard satellite board uart, default */ | 33 /* UARTD: keyboard satellite board uart, default */ |
| 34 #define CONFIG_SYS_NS16550_COM1 NV_ADDRESS_MAP_APB_UARTD_BASE | 34 #define CONFIG_SYS_NS16550_COM1 NV_ADDRESS_MAP_APB_UARTD_BASE |
| 35 | 35 |
| 36 /* UARTA: debug board uart */ | 36 /* UARTA: debug board uart */ |
| 37 #define CONFIG_SYS_NS16550_COM2 NV_ADDRESS_MAP_APB_UARTA_BASE | 37 #define CONFIG_SYS_NS16550_COM2 NV_ADDRESS_MAP_APB_UARTA_BASE |
| 38 | 38 |
| 39 #define CONFIG_EXTRA_ENV_SETTINGS \ | 39 #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 40 CONFIG_TEGRA_ENV_SETTINGS \ | 40 CONFIG_TEGRA_ENV_SETTINGS \ |
| 41 » "platform_extras=mem=384M@0M nvmem=128M@384M mem=512M@512M\0" | 41 » "platform_extras=mem=384M@0M nvmem=128M@384M mem=512M@512M "\ |
| 42 » » "lp0_vec="TEGRA_LP0_SIZE_STR"@"TEGRA_LP0_DEFAULT_ADDR_STR "\0" |
| 42 | 43 |
| 43 #define LINUX_MACH_TYPE MACH_TYPE_TEGRA_SEABOARD | 44 #define LINUX_MACH_TYPE MACH_TYPE_TEGRA_SEABOARD |
| 44 #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 //lp1, 1GB | 45 #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 //lp1, 1GB |
| 45 | 46 |
| 46 #define CONFIG_I2CP_PIN_MUX 1 | 47 #define CONFIG_I2CP_PIN_MUX 1 |
| 47 #define CONFIG_I2C1_PIN_MUX 1 | 48 #define CONFIG_I2C1_PIN_MUX 1 |
| 48 #define CONFIG_I2C2_PIN_MUX 2 | 49 #define CONFIG_I2C2_PIN_MUX 2 |
| 49 #define CONFIG_I2C3_PIN_MUX 1 | 50 #define CONFIG_I2C3_PIN_MUX 1 |
| 50 | 51 |
| 51 #define CONFIG_SYS_MEMTEST_START 0x0000 | 52 #define CONFIG_SYS_MEMTEST_START 0x0000 |
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| 67 * and undef or delete the CONFIG_ENV_IS_NOWHERE (if present). | 68 * and undef or delete the CONFIG_ENV_IS_NOWHERE (if present). |
| 68 * Note that you MUST change the ENV_OFFSET to be beyond the BCT/BL area! | 69 * Note that you MUST change the ENV_OFFSET to be beyond the BCT/BL area! |
| 69 */ | 70 */ |
| 70 #if 0 | 71 #if 0 |
| 71 #define CONFIG_ENV_IS_IN_SPI_FLASH | 72 #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 72 #define CONFIG_ENV_SECT_SIZE 0x1000 /* 4K sectors */ | 73 #define CONFIG_ENV_SECT_SIZE 0x1000 /* 4K sectors */ |
| 73 #define CONFIG_ENV_OFFSET 0x0 /* DANGER! for test, use offset != 0 */ | 74 #define CONFIG_ENV_OFFSET 0x0 /* DANGER! for test, use offset != 0 */ |
| 74 #endif | 75 #endif |
| 75 | 76 |
| 76 #endif //__configs_chromeos_tegra2_seaboard_recovery_h__ | 77 #endif //__configs_chromeos_tegra2_seaboard_recovery_h__ |
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