Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(2490)

Unified Diff: src/assembler_constants_ia32.h

Issue 476323004: Start adding an integrated assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: simplify Created 6 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
Index: src/assembler_constants_ia32.h
diff --git a/src/assembler_constants_ia32.h b/src/assembler_constants_ia32.h
new file mode 100644
index 0000000000000000000000000000000000000000..f11c2863bd24b3652ce4e22ca74870b04c0951a2
--- /dev/null
+++ b/src/assembler_constants_ia32.h
@@ -0,0 +1,131 @@
+// Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
+// for details. All rights reserved. Use of this source code is governed by a
+// BSD-style license that can be found in the LICENSE file.
+//
+// Modified by the Subzero authors.
+//
+//===- subzero/src/assembler_constants_ia32.h - x86-32 consts ---*- C++ -*-===//
+//
+// The Subzero Code Generator
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains constants related to the assembler encoding
+// of x86-32 operands.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef SUBZERO_SRC_ASSEMBLER_CONSTANTS_IA32_H_
+#define SUBZERO_SRC_ASSEMBLER_CONSTANTS_IA32_H_
+
+namespace Ice {
+namespace x86 {
+
+// Unify w/ Ice...
+enum Register {
+ kFirstFreeCpuRegister = 0,
+ EAX = 0,
+ ECX = 1,
+ EDX = 2,
+ EBX = 3,
+ ESP = 4,
+ EBP = 5,
+ ESI = 6,
+ EDI = 7,
+ kLastFreeCpuRegister = 7,
+ kNoRegister = -1 // Signals an illegal register.
+};
+
+// Unify w/ Ice...
+enum ByteRegister {
+ AL = 0,
+ CL = 1,
+ DL = 2,
+ BL = 3,
+ AH = 4,
+ CH = 5,
+ DH = 6,
+ BH = 7,
+ kNoByteRegister = -1 // Signals an illegal register.
+};
+
+// Unify w/ Ice...
+enum XmmRegister {
+ XMM0 = 0,
+ XMM1 = 1,
+ XMM2 = 2,
+ XMM3 = 3,
+ XMM4 = 4,
+ XMM5 = 5,
+ XMM6 = 6,
+ XMM7 = 7,
+ kNoXmmRegister = -1 // Signals an illegal register.
+};
+
+// Unify w/ Ice...
+enum ScaleFactor { TIMES_1 = 0, TIMES_2 = 1, TIMES_4 = 2, TIMES_8 = 3 };
+
+// Unify w/ Ice...
+enum Condition {
+ DID_OVERFLOW = 0,
+ NO_OVERFLOW = 1,
+ BELOW = 2,
+ ABOVE_EQUAL = 3,
+ EQUAL = 4,
+ NOT_EQUAL = 5,
+ BELOW_EQUAL = 6,
+ ABOVE = 7,
+ SIGN = 8,
+ NOT_SIGN = 9,
+ PARITY_EVEN = 10,
+ PARITY_ODD = 11,
+ LESS = 12,
+ GREATER_EQUAL = 13,
+ LESS_EQUAL = 14,
+ GREATER = 15,
+
+ ZERO = EQUAL,
+ NOT_ZERO = NOT_EQUAL,
+ NEGATIVE = SIGN,
+ POSITIVE = NOT_SIGN,
+ CARRY = BELOW,
+ NOT_CARRY = ABOVE_EQUAL
+};
+
+// TODO(jvoung): We probably don't need to initialize the buffers
+// with breakpoints, since we're not directly executing them.
+class Instr {
+public:
+ static const uint8_t kHltInstruction = 0xF4;
+ // We prefer not to use the int3 instruction since it conflicts with gdb.
+ static const uint8_t kBreakPointInstruction = kHltInstruction;
+ static const int kBreakPointInstructionSize = 1;
+
+ bool IsBreakPoint() {
+ assert(kBreakPointInstructionSize == 1);
+ return (*reinterpret_cast<const uint8_t *>(this)) == kBreakPointInstruction;
+ }
+
+ // Instructions are read out of a code stream. The only way to get a
+ // reference to an instruction is to convert a pointer. There is no way
+ // to allocate or create instances of class Instr.
+ // Use the At(pc) function to create references to Instr.
+ static Instr *At(uintptr_t pc) { return reinterpret_cast<Instr *>(pc); }
+
+ // private:
+ // DISALLOW_ALLOCATION();
+ // We need to prevent the creation of instances of class Instr.
+ // DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
+};
+
+// The largest multibyte nop we will emit. This could go up to 15 if it
+// becomes important to us.
+const int MAX_NOP_SIZE = 8;
+
+} // end of namespace x86
+} // end of namespace Ice
+
+#endif // SUBZERO_SRC_ASSEMBLER_CONSTANTS_IA32_H_

Powered by Google App Engine
This is Rietveld 408576698