Unify MachineType and RepType.

src/compiler/x64/instruction-selector-x64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 38 matching lines @@
         return !isolate()->heap()->InNewSpace(*value);
       }
       default:
         return false;
     }
   }
 };
 
 
 void InstructionSelector::VisitLoad(Node* node) {
-  MachineType rep = OpParameter<MachineType>(node);
+  MachineType rep = RepresentationOf(OpParameter<MachineType>(node));
   X64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
-  InstructionOperand* output = rep == kMachineFloat64
-                                   ? g.DefineAsDoubleRegister(node)
-                                   : g.DefineAsRegister(node);
+  InstructionOperand* output = rep == rFloat64 ? g.DefineAsDoubleRegister(node)
+                                               : g.DefineAsRegister(node);
   ArchOpcode opcode;
+  // TODO(titzer): signed/unsigned small loads
   switch (rep) {
-    case kMachineFloat64:
+    case rFloat64:
       opcode = kSSELoad;
       break;
-    case kMachineWord8:
+    case rBit:  // Fall through.
+    case rWord8:
       opcode = kX64LoadWord8;
       break;
-    case kMachineWord16:
+    case rWord16:
       opcode = kX64LoadWord16;
       break;
-    case kMachineWord32:
+    case rWord32:
       opcode = kX64LoadWord32;
       break;
-    case kMachineTagged:  // Fall through.
-    case kMachineWord64:
+    case rTagged:  // Fall through.
+    case rWord64:
       opcode = kX64LoadWord64;
       break;
     default:
       UNREACHABLE();
       return;
   }
   if (g.CanBeImmediate(base)) {
     // load [#base + %index]
     Emit(opcode | AddressingModeField::encode(kMode_MRI), output,
          g.UseRegister(index), g.UseImmediate(base));
   } else if (g.CanBeImmediate(index)) {  // load [%base + #index]
     Emit(opcode | AddressingModeField::encode(kMode_MRI), output,
          g.UseRegister(base), g.UseImmediate(index));
   } else {  // load [%base + %index + K]
     Emit(opcode | AddressingModeField::encode(kMode_MR1I), output,
          g.UseRegister(base), g.UseRegister(index));
   }
   // TODO(turbofan): addressing modes [r+r*{2,4,8}+K]
 }
 
 
 void InstructionSelector::VisitStore(Node* node) {
   X64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
   Node* value = node->InputAt(2);
 
   StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
-  MachineType rep = store_rep.rep;
+  MachineType rep = RepresentationOf(store_rep.machine_type);
   if (store_rep.write_barrier_kind == kFullWriteBarrier) {
-    DCHECK(rep == kMachineTagged);
+    DCHECK(rep == rTagged);
     // TODO(dcarney): refactor RecordWrite function to take temp registers
     //                and pass them here instead of using fixed regs
     // TODO(dcarney): handle immediate indices.
     InstructionOperand* temps[] = {g.TempRegister(rcx), g.TempRegister(rdx)};
     Emit(kX64StoreWriteBarrier, NULL, g.UseFixed(base, rbx),
          g.UseFixed(index, rcx), g.UseFixed(value, rdx), ARRAY_SIZE(temps),
          temps);
     return;
   }
   DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
   bool is_immediate = false;
   InstructionOperand* val;
-  if (rep == kMachineFloat64) {
+  if (rep == rFloat64) {
     val = g.UseDoubleRegister(value);
   } else {
     is_immediate = g.CanBeImmediate(value);
     if (is_immediate) {
       val = g.UseImmediate(value);
-    } else if (rep == kMachineWord8) {
+    } else if (rep == rWord8 || rep == rBit) {
       val = g.UseByteRegister(value);
     } else {
       val = g.UseRegister(value);
     }
   }
   ArchOpcode opcode;
   switch (rep) {
-    case kMachineFloat64:
+    case rFloat64:
       opcode = kSSEStore;
       break;
-    case kMachineWord8:
+    case rBit:  // Fall through.
+    case rWord8:
       opcode = is_immediate ? kX64StoreWord8I : kX64StoreWord8;
       break;
-    case kMachineWord16:
+    case rWord16:
       opcode = is_immediate ? kX64StoreWord16I : kX64StoreWord16;
       break;
-    case kMachineWord32:
+    case rWord32:
       opcode = is_immediate ? kX64StoreWord32I : kX64StoreWord32;
       break;
-    case kMachineTagged:  // Fall through.
-    case kMachineWord64:
+    case rTagged:  // Fall through.
+    case rWord64:
       opcode = is_immediate ? kX64StoreWord64I : kX64StoreWord64;
       break;
     default:
       UNREACHABLE();
       return;
   }
   if (g.CanBeImmediate(base)) {
     // store [#base + %index], %|#value
     Emit(opcode | AddressingModeField::encode(kMode_MRI), NULL,
          g.UseRegister(index), g.UseImmediate(base), val);
@@ skipping 549 matching lines @@
   if (descriptor->kind() == CallDescriptor::kCallAddress &&
       buffer.pushed_count > 0) {
     DCHECK(deoptimization == NULL && continuation == NULL);
     Emit(kPopStack | MiscField::encode(buffer.pushed_count), NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8