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Unified Diff: src/compiler/arm/instruction-selector-arm.cc

Issue 469743002: [turbofan] Refactor the InstructionSelector tests. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: ARM64 Created 6 years, 4 months ago
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Index: src/compiler/arm/instruction-selector-arm.cc
diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc
index 029d6e3b96e9d0c61ca3d9e03301afbfe6ffae56..22af55faeec9a6e04045d8999c15bec9ef8716f5 100644
--- a/src/compiler/arm/instruction-selector-arm.cc
+++ b/src/compiler/arm/instruction-selector-arm.cc
@@ -141,11 +141,22 @@ static bool TryMatchROR(InstructionSelector* selector,
if (value != mshl.left().node()) return false;
Node* shift = mshr.right().node();
Int32Matcher mshift(shift);
- if (mshift.IsInRange(1, 31) && mshl.right().Is(32 - mshift.Value())) {
- *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_I);
- *value_return = g.UseRegister(value);
- *shift_return = g.UseImmediate(shift);
- return true;
+ if (mshift.IsInRange(1, 31)) {
+ if (mshl.right().Is(32 - mshift.Value())) {
+ *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_I);
+ *value_return = g.UseRegister(value);
+ *shift_return = g.UseImmediate(shift);
+ return true;
+ }
+ if (mshl.right().IsInt32Sub()) {
+ Int32BinopMatcher mshlright(mshl.right().node());
+ if (mshlright.left().Is(32) && mshlright.right().Is(mshift.Value())) {
+ *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_I);
+ *value_return = g.UseRegister(value);
+ *shift_return = g.UseImmediate(shift);
+ return true;
+ }
+ }
}
if (mshl.right().IsInt32Sub()) {
Int32BinopMatcher mshlright(mshl.right().node());
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