[turbofan] Introduce WordRor machine operator.

src/compiler/arm/instruction-selector-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler-intrinsics.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 108 matching lines @@
                  g.UseDoubleRegister(node->InputAt(0)),
                  g.UseDoubleRegister(node->InputAt(1)));
 }
 
 
 static bool TryMatchROR(InstructionSelector* selector,
                         InstructionCode* opcode_return, Node* node,
                         InstructionOperand** value_return,
                         InstructionOperand** shift_return) {
   ArmOperandGenerator g(selector);
-  if (node->opcode() != IrOpcode::kWord32Or) return false;
+  if (node->opcode() != IrOpcode::kWord32Ror) return false;
   Int32BinopMatcher m(node);
-  Node* shl = m.left().node();
-  Node* shr = m.right().node();
-  if (m.left().IsWord32Shr() && m.right().IsWord32Shl()) {
-    std::swap(shl, shr);
-  } else if (!m.left().IsWord32Shl() || !m.right().IsWord32Shr()) {
-    return false;
+  *value_return = g.UseRegister(m.left().node());
+  if (m.right().IsInRange(1, 31)) {
+    *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_I);
+    *shift_return = g.UseImmediate(m.right().node());
+  } else {
+    *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_R);
+    *shift_return = g.UseRegister(m.right().node());
   }
-  Int32BinopMatcher mshr(shr);
-  Int32BinopMatcher mshl(shl);
-  Node* value = mshr.left().node();
-  if (value != mshl.left().node()) return false;
-  Node* shift = mshr.right().node();
-  Int32Matcher mshift(shift);
-  if (mshift.IsInRange(1, 31)) {
-    if (mshl.right().Is(32 - mshift.Value())) {
-      *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_I);
-      *value_return = g.UseRegister(value);
-      *shift_return = g.UseImmediate(shift);
-      return true;
-    }
-    if (mshl.right().IsInt32Sub()) {
-      Int32BinopMatcher mshlright(mshl.right().node());
-      if (mshlright.left().Is(32) && mshlright.right().Is(mshift.Value())) {
-        *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_I);
-        *value_return = g.UseRegister(value);
-        *shift_return = g.UseImmediate(shift);
-        return true;
-      }
-    }
-  }
-  if (mshl.right().IsInt32Sub()) {
-    Int32BinopMatcher mshlright(mshl.right().node());
-    if (!mshlright.left().Is(32)) return false;
-    if (mshlright.right().node() != shift) return false;
-    *opcode_return |= AddressingModeField::encode(kMode_Operand2_R_ROR_R);
-    *value_return = g.UseRegister(value);
-    *shift_return = g.UseRegister(shift);
-    return true;
-  }
-  return false;
+  return true;
 }
 
 
 static inline bool TryMatchASR(InstructionSelector* selector,
                                InstructionCode* opcode_return, Node* node,
                                InstructionOperand** value_return,
                                InstructionOperand** shift_return) {
   ArmOperandGenerator g(selector);
   if (node->opcode() != IrOpcode::kWord32Sar) return false;
   Int32BinopMatcher m(node);
@@ skipping 294 matching lines @@
       Emit(kArmBfc, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
            g.TempImmediate(lsb), g.TempImmediate(width));
       return;
     }
   }
   VisitBinop(this, node, kArmAnd, kArmAnd);
 }
 
 
 void InstructionSelector::VisitWord32Or(Node* node) {
-  ArmOperandGenerator g(this);
-  InstructionCode opcode = kArmMov;
-  InstructionOperand* value_operand;
-  InstructionOperand* shift_operand;
-  if (TryMatchROR(this, &opcode, node, &value_operand, &shift_operand)) {
-    Emit(opcode, g.DefineAsRegister(node), value_operand, shift_operand);
-    return;
-  }
   VisitBinop(this, node, kArmOrr, kArmOrr);
 }
 
 
 void InstructionSelector::VisitWord32Xor(Node* node) {
   ArmOperandGenerator g(this);
   Int32BinopMatcher m(node);
   if (m.right().Is(-1)) {
     InstructionCode opcode = kArmMvn;
     InstructionOperand* value_operand;
@@ skipping 52 matching lines @@
   }
   VisitShift(this, node, TryMatchLSR);
 }
 
 
 void InstructionSelector::VisitWord32Sar(Node* node) {
   VisitShift(this, node, TryMatchASR);
 }
 
 
+void InstructionSelector::VisitWord32Ror(Node* node) {
+  VisitShift(this, node, TryMatchROR);
+}
+
+
 void InstructionSelector::VisitInt32Add(Node* node) {
   ArmOperandGenerator g(this);
   Int32BinopMatcher m(node);
   if (m.left().IsInt32Mul() && CanCover(node, m.left().node())) {
     Int32BinopMatcher mleft(m.left().node());
     Emit(kArmMla, g.DefineAsRegister(node), g.UseRegister(mleft.left().node()),
          g.UseRegister(mleft.right().node()), g.UseRegister(m.right().node()));
     return;
   }
   if (m.right().IsInt32Mul() && CanCover(node, m.right().node())) {
@@ skipping 370 matching lines @@
     DCHECK(cont->IsSet());
     Emit(cont->Encode(kArmVcmpF64), g.DefineAsRegister(cont->result()),
          g.UseDoubleRegister(m.left().node()),
          g.UseDoubleRegister(m.right().node()));
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8