Fixes to support ARMv5 lego mindstorm.

runtime/vm/intermediate_language_arm.cc

Index: runtime/vm/intermediate_language_arm.cc
===================================================================
--- runtime/vm/intermediate_language_arm.cc	(revision 39210)
+++ runtime/vm/intermediate_language_arm.cc	(working copy)
@@ -3021,13 +3021,15 @@
               // IP: result bits 32..63.
               __ cmp(IP, Operand(result, ASR, 31));
               __ b(deopt, NE);
-            } else {
+            } else if (TargetCPUFeatures::can_divide()) {
               const QRegister qtmp = locs()->temp(0).fpu_reg();
               const DRegister dtmp0 = EvenDRegisterOf(qtmp);
               const DRegister dtmp1 = OddDRegisterOf(qtmp);
               __ LoadImmediate(IP, value);
               __ CheckMultSignedOverflow(left, IP, result, dtmp0, dtmp1, deopt);
               __ mul(result, left, IP);
+            } else {
+              __ b(deopt);
             }
           }
         }
@@ -3160,12 +3162,14 @@
           // IP: result bits 32..63.
           __ cmp(IP, Operand(result, ASR, 31));
           __ b(deopt, NE);
-        } else {
+        } else if (TargetCPUFeatures::can_divide()) {
           const QRegister qtmp = locs()->temp(0).fpu_reg();
           const DRegister dtmp0 = EvenDRegisterOf(qtmp);
           const DRegister dtmp1 = OddDRegisterOf(qtmp);
           __ CheckMultSignedOverflow(IP, right, result, dtmp0, dtmp1, deopt);
           __ mul(result, IP, right);
+        } else {
+          __ b(deopt);
         }
       }
       break;
@@ -3192,12 +3196,15 @@
         __ b(deopt, EQ);
       }
       const Register temp = locs()->temp(0).reg();
-      const DRegister dtemp = EvenDRegisterOf(locs()->temp(1).fpu_reg());
-      __ SmiUntag(temp, left);
-      __ SmiUntag(IP, right);
+      if (TargetCPUFeatures::can_divide()) {
+        const DRegister dtemp = EvenDRegisterOf(locs()->temp(1).fpu_reg());
+        __ SmiUntag(temp, left);
+        __ SmiUntag(IP, right);
+        __ IntegerDivide(result, temp, IP, dtemp, DTMP);
+      } else {
+        __ b(deopt);
+      }
 
-      __ IntegerDivide(result, temp, IP, dtemp, DTMP);
-
       // Check the corner case of dividing the 'MIN_SMI' with -1, in which
       // case we cannot tag the result.
       __ CompareImmediate(result, 0x40000000);
@@ -3212,13 +3219,15 @@
         __ b(deopt, EQ);
       }
       const Register temp = locs()->temp(0).reg();
-      const DRegister dtemp = EvenDRegisterOf(locs()->temp(1).fpu_reg());
-      __ SmiUntag(temp, left);
+      if (TargetCPUFeatures::can_divide()) {
+        const DRegister dtemp = EvenDRegisterOf(locs()->temp(1).fpu_reg());
+        __ SmiUntag(temp, left);
+        __ SmiUntag(IP, right);
+        __ IntegerDivide(result, temp, IP, dtemp, DTMP);
+      } else {
+        __ b(deopt);
+      }
       __ SmiUntag(IP, right);
-
-      __ IntegerDivide(result, temp, IP, dtemp, DTMP);
-
-      __ SmiUntag(IP, right);
       __ mls(result, IP, result, temp);  // result <- left - right * result
       __ SmiTag(result);
       //  res = left % right;
@@ -5394,13 +5403,15 @@
       __ b(deopt, EQ);
     }
     const Register temp = locs()->temp(0).reg();
-    const DRegister dtemp = EvenDRegisterOf(locs()->temp(1).fpu_reg());
+    if (TargetCPUFeatures::can_divide()) {
+      const DRegister dtemp = EvenDRegisterOf(locs()->temp(1).fpu_reg());
+      __ SmiUntag(temp, left);
+      __ SmiUntag(IP, right);
+      __ IntegerDivide(result_div, temp, IP, dtemp, DTMP);
+    } else {
+      __ b(deopt);
+    }
 
-    __ SmiUntag(temp, left);
-    __ SmiUntag(IP, right);
-
-    __ IntegerDivide(result_div, temp, IP, dtemp, DTMP);
-
     // Check the corner case of dividing the 'MIN_SMI' with -1, in which
     // case we cannot tag the result.
     __ CompareImmediate(result_div, 0x40000000);