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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
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551 if (TargetCPUFeatures::arm_version() == ARMv5TE) { | 551 if (TargetCPUFeatures::arm_version() == ARMv5TE) { |
552 nop(); | 552 nop(); |
553 } | 553 } |
554 } | 554 } |
555 | 555 |
556 | 556 |
557 void Assembler::stm(BlockAddressMode am, Register base, RegList regs, | 557 void Assembler::stm(BlockAddressMode am, Register base, RegList regs, |
558 Condition cond) { | 558 Condition cond) { |
559 ASSERT(regs != 0); | 559 ASSERT(regs != 0); |
560 EmitMultiMemOp(cond, am, false, base, regs); | 560 EmitMultiMemOp(cond, am, false, base, regs); |
561 if (TargetCPUFeatures::arm_version() == ARMv5TE) { | |
regis
2014/08/13 19:47:39
Can you add a comment explaining why this is neede
zra
2014/08/13 20:08:55
Done.
| |
562 nop(); | |
563 } | |
561 } | 564 } |
562 | 565 |
563 | 566 |
564 void Assembler::ldrex(Register rt, Register rn, Condition cond) { | 567 void Assembler::ldrex(Register rt, Register rn, Condition cond) { |
565 ASSERT(rn != kNoRegister); | 568 ASSERT(rn != kNoRegister); |
566 ASSERT(rt != kNoRegister); | 569 ASSERT(rt != kNoRegister); |
567 ASSERT(cond != kNoCondition); | 570 ASSERT(cond != kNoCondition); |
568 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | | 571 int32_t encoding = (static_cast<int32_t>(cond) << kConditionShift) | |
569 B24 | | 572 B24 | |
570 B23 | | 573 B23 | |
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2803 tst(rn, Operand(IP), cond); | 2806 tst(rn, Operand(IP), cond); |
2804 } | 2807 } |
2805 } | 2808 } |
2806 | 2809 |
2807 void Assembler::IntegerDivide(Register result, Register left, Register right, | 2810 void Assembler::IntegerDivide(Register result, Register left, Register right, |
2808 DRegister tmpl, DRegister tmpr) { | 2811 DRegister tmpl, DRegister tmpr) { |
2809 ASSERT(tmpl != tmpr); | 2812 ASSERT(tmpl != tmpr); |
2810 if (TargetCPUFeatures::integer_division_supported()) { | 2813 if (TargetCPUFeatures::integer_division_supported()) { |
2811 sdiv(result, left, right); | 2814 sdiv(result, left, right); |
2812 } else { | 2815 } else { |
2816 ASSERT(TargetCPUFeatures::vfp_supported()); | |
2813 SRegister stmpl = static_cast<SRegister>(2 * tmpl); | 2817 SRegister stmpl = static_cast<SRegister>(2 * tmpl); |
2814 SRegister stmpr = static_cast<SRegister>(2 * tmpr); | 2818 SRegister stmpr = static_cast<SRegister>(2 * tmpr); |
2815 vmovsr(stmpl, left); | 2819 vmovsr(stmpl, left); |
2816 vcvtdi(tmpl, stmpl); // left is in tmpl. | 2820 vcvtdi(tmpl, stmpl); // left is in tmpl. |
2817 vmovsr(stmpr, right); | 2821 vmovsr(stmpr, right); |
2818 vcvtdi(tmpr, stmpr); // right is in tmpr. | 2822 vcvtdi(tmpr, stmpr); // right is in tmpr. |
2819 vdivd(tmpr, tmpl, tmpr); | 2823 vdivd(tmpr, tmpl, tmpr); |
2820 vcvtid(stmpr, tmpr); | 2824 vcvtid(stmpr, tmpr); |
2821 vmovrs(result, stmpr); | 2825 vmovrs(result, stmpr); |
2822 } | 2826 } |
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3367 | 3371 |
3368 | 3372 |
3369 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3373 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
3370 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3374 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
3371 return fpu_reg_names[reg]; | 3375 return fpu_reg_names[reg]; |
3372 } | 3376 } |
3373 | 3377 |
3374 } // namespace dart | 3378 } // namespace dart |
3375 | 3379 |
3376 #endif // defined TARGET_ARCH_ARM | 3380 #endif // defined TARGET_ARCH_ARM |
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