Subzero: Factor our commonalities between mov-like instructions.

src/IceInstX8632.cpp

 //===- subzero/src/IceInstX8632.cpp - X86-32 instruction implementation ---===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the InstX8632 and OperandX8632 classes,
@@ skipping 201 matching lines @@
     : InstX8632(Func, InstX8632::Mfence, 0, NULL) {
   HasSideEffects = true;
 }
 
 InstX8632Store::InstX8632Store(Cfg *Func, Operand *Value, OperandX8632 *Mem)
     : InstX8632(Func, InstX8632::Store, 2, NULL) {
   addSource(Value);
   addSource(Mem);
 }
 
-InstX8632Mov::InstX8632Mov(Cfg *Func, Variable *Dest, Operand *Source)
-    : InstX8632(Func, InstX8632::Mov, 1, Dest) {
-  addSource(Source);
-}
-
-InstX8632Movp::InstX8632Movp(Cfg *Func, Variable *Dest, Operand *Source)
-    : InstX8632(Func, InstX8632::Movp, 1, Dest) {
-  addSource(Source);
-}
-
 InstX8632StoreP::InstX8632StoreP(Cfg *Func, Operand *Value, OperandX8632 *Mem)
     : InstX8632(Func, InstX8632::StoreP, 2, NULL) {
   addSource(Value);
   addSource(Mem);
 }
 
 InstX8632StoreQ::InstX8632StoreQ(Cfg *Func, Operand *Value, OperandX8632 *Mem)
     : InstX8632(Func, InstX8632::StoreQ, 2, NULL) {
   addSource(Value);
   addSource(Mem);
 }
 
-InstX8632Movq::InstX8632Movq(Cfg *Func, Variable *Dest, Operand *Source)
-    : InstX8632(Func, InstX8632::Movq, 1, Dest) {
-  addSource(Source);
-}
-
 InstX8632Movsx::InstX8632Movsx(Cfg *Func, Variable *Dest, Operand *Source)
     : InstX8632(Func, InstX8632::Movsx, 1, Dest) {
   addSource(Source);
 }
 
 InstX8632Movzx::InstX8632Movzx(Cfg *Func, Variable *Dest, Operand *Source)
     : InstX8632(Func, InstX8632::Movzx, 1, Dest) {
   addSource(Source);
 }
 
 InstX8632Fld::InstX8632Fld(Cfg *Func, Operand *Src)
     : InstX8632(Func, InstX8632::Fld, 1, NULL) {
   addSource(Src);
 }
 
 InstX8632Fstp::InstX8632Fstp(Cfg *Func, Variable *Dest)
     : InstX8632(Func, InstX8632::Fstp, 0, Dest) {}
 
 InstX8632Pop::InstX8632Pop(Cfg *Func, Variable *Dest)
     : InstX8632(Func, InstX8632::Pop, 0, Dest) {}
 
 InstX8632Push::InstX8632Push(Cfg *Func, Operand *Source,
                              bool SuppressStackAdjustment)
     : InstX8632(Func, InstX8632::Push, 1, NULL),
       SuppressStackAdjustment(SuppressStackAdjustment) {
   addSource(Source);
 }
 
-bool InstX8632Mov::isRedundantAssign() const {
-  // TODO(stichnot): The isRedundantAssign() implementations for
-  // InstX8632Mov, InstX8632Movp, and InstX8632Movq are
-  // identical. Consolidate them.
-  Variable *Src = llvm::dyn_cast<Variable>(getSrc(0));
-  if (Src == NULL)
-    return false;
-  if (getDest()->hasReg() && getDest()->getRegNum() == Src->getRegNum()) {
-    // TODO: On x86-64, instructions like "mov eax, eax" are used to
-    // clear the upper 32 bits of rax.  We need to recognize and
-    // preserve these.
-    return true;
-  }
-  if (!getDest()->hasReg() && !Src->hasReg() &&
-      Dest->getStackOffset() == Src->getStackOffset())
-    return true;
-  return false;
-}
-
-bool InstX8632Movp::isRedundantAssign() const {
-  Variable *Src = llvm::dyn_cast<Variable>(getSrc(0));
-  if (Src == NULL)
-    return false;
-  if (getDest()->hasReg() && getDest()->getRegNum() == Src->getRegNum()) {
-    return true;
-  }
-  if (!getDest()->hasReg() && !Src->hasReg() &&
-      Dest->getStackOffset() == Src->getStackOffset())
-    return true;
-  return false;
-}
-
-bool InstX8632Movq::isRedundantAssign() const {
-  Variable *Src = llvm::dyn_cast<Variable>(getSrc(0));
-  if (Src == NULL)
-    return false;
-  if (getDest()->hasReg() && getDest()->getRegNum() == Src->getRegNum()) {
-    return true;
-  }
-  if (!getDest()->hasReg() && !Src->hasReg() &&
-      Dest->getStackOffset() == Src->getStackOffset())
-    return true;
-  return false;
-}
-
 InstX8632Ret::InstX8632Ret(Cfg *Func, Variable *Source)
     : InstX8632(Func, InstX8632::Ret, Source ? 1 : 0, NULL) {
   if (Source)
     addSource(Source);
 }
 
 InstX8632Xadd::InstX8632Xadd(Cfg *Func, Operand *Dest, Variable *Source,
                              bool Locked)
     : InstX8632Lockable(Func, InstX8632::Xadd, 2,
                         llvm::dyn_cast<Variable>(Dest), Locked) {
@@ skipping 107 matching lines @@
     if (ShiftReg && ShiftReg->getRegNum() == TargetX8632::Reg_ecx) {
       Str << "cl";
       EmittedSrc1 = true;
     }
   }
   if (!EmittedSrc1)
     Inst->getSrc(1)->emit(Func);
   Str << "\n";
 }
 
+bool checkForRedundantAssign(const Variable *Dest, const Operand *Source) {
+  const Variable *Src = llvm::dyn_cast<const Variable>(Source);
+  if (Src == NULL)
+    return false;
+  if (Dest->hasReg() && Dest->getRegNum() == Src->getRegNum()) {
+    // TODO: On x86-64, instructions like "mov eax, eax" are used to
+    // clear the upper 32 bits of rax.  We need to recognize and
+    // preserve these.
+    return true;
+  }
+  if (!Dest->hasReg() && !Src->hasReg() &&
+      Dest->getStackOffset() == Src->getStackOffset())
+    return true;
+  return false;
+}
 
 // In-place ops
 template <> const char *InstX8632Bswap::Opcode = "bswap";
 template <> const char *InstX8632Neg::Opcode = "neg";
 // Unary ops
 template <> const char *InstX8632Bsf::Opcode = "bsf";
 template <> const char *InstX8632Bsr::Opcode = "bsr";
 template <> const char *InstX8632Lea::Opcode = "lea";
 template <> const char *InstX8632Movd::Opcode = "movd";
 template <> const char *InstX8632Sqrtss::Opcode = "sqrtss";
 template <> const char *InstX8632Cbwdq::Opcode = "cbw/cwd/cdq";
+// Mov-like ops
+template <> const char *InstX8632Mov::Opcode = "mov";
+template <> const char *InstX8632Movp::Opcode = "movups";
+template <> const char *InstX8632Movq::Opcode = "movq";
 // Binary ops
 template <> const char *InstX8632Add::Opcode = "add";
 template <> const char *InstX8632Addps::Opcode = "addps";
 template <> const char *InstX8632Adc::Opcode = "adc";
 template <> const char *InstX8632Addss::Opcode = "addss";
 template <> const char *InstX8632Padd::Opcode = "padd";
 template <> const char *InstX8632Sub::Opcode = "sub";
 template <> const char *InstX8632Subps::Opcode = "subps";
 template <> const char *InstX8632Subss::Opcode = "subss";
 template <> const char *InstX8632Sbb::Opcode = "sbb";
@@ skipping 522 matching lines @@
     Type Ty = VSrc0->getType();
     // lea on x86-32 doesn't accept mem128 operands, so cast VSrc0 to an
     // acceptable type.
     VSrc0->asType(isVectorType(Ty) ? IceType_i32 : Ty).emit(Func);
   } else {
     Src0->emit(Func);
   }
   Str << "\n";
 }
 
-void InstX8632Mov::emit(const Cfg *Func) const {
+template <> void InstX8632Mov::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Operand *Src = getSrc(0);
   // The llvm-mc assembler using Intel syntax has a bug in which "mov
   // reg, RelocatableConstant" does not generate the right instruction
   // with a relocation.  To work around, we emit "lea reg,
   // [RelocatableConstant]".  Also, the lowering and legalization is
   // changed to allow relocatable constants only in Assign and Call
   // instructions or in Mem operands.  TODO(stichnot): remove LEAHACK
   // once a proper emitter is used.
@@ skipping 15 matching lines @@
   // value between a vector and a scalar (which movss is used for).
   // Clean this up.
   assert(Func->getTarget()->typeWidthInBytesOnStack(getDest()->getType()) ==
          Func->getTarget()->typeWidthInBytesOnStack(Src->getType()));
   getDest()->asType(Src->getType()).emit(Func);
   Str << ", ";
   Src->emit(Func);
   Str << "\n";
 }
 
-void InstX8632Mov::dump(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrDump();
-  Str << "mov." << getDest()->getType() << " ";
-  dumpDest(Func);
-  Str << ", ";
-  dumpSources(Func);
-}
-
-void InstX8632Movp::emit(const Cfg *Func) const {
+template <> void InstX8632Movp::emit(const Cfg *Func) const {
   // TODO(wala,stichnot): movups works with all vector operands, but
   // there exist other instructions (movaps, movdqa, movdqu) that may
   // perform better, depending on the data type and alignment of the
   // operands.
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovups\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
-void InstX8632Movp::dump(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrDump();
-  Str << "movups." << getDest()->getType() << " ";
-  dumpDest(Func);
-  Str << ", ";
-  dumpSources(Func);
-}
-
-void InstX8632Movq::emit(const Cfg *Func) const {
+template <> void InstX8632Movq::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   assert(getDest()->getType() == IceType_i64 ||
          getDest()->getType() == IceType_f64);
   Str << "\tmovq\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
-void InstX8632Movq::dump(const Cfg *Func) const {
-  Ostream &Str = Func->getContext()->getStrDump();
-  Str << "movq." << getDest()->getType() << " ";
-  dumpDest(Func);
-  Str << ", ";
-  dumpSources(Func);
-}
-
 void InstX8632Movsx::emit(const Cfg *Func) const {
   Ostream &Str = Func->getContext()->getStrEmit();
   assert(getSrcSize() == 1);
   Str << "\tmovsx\t";
   getDest()->emit(Func);
   Str << ", ";
   getSrc(0)->emit(Func);
   Str << "\n";
 }
 
@@ skipping 412 matching lines @@
   default:
     Str << "???";
     break;
   }
   Str << "(";
   Var->dump(Func);
   Str << ")";
 }
 
 } // end of namespace Ice