Chromium Code Reviews| OLD | NEW |
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| 1 ; This checks to ensure that Subzero aligns spill slots. | |
| 2 | |
| 3 ; RUN: %llvm2ice --verbose none %s | FileCheck %s | |
| 4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | |
| 5 ; RUN: %llvm2ice -O2 --verbose none %s \ | |
| 6 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | |
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Jim Stichnoth
2014/08/13 23:59:34
Change the -arch lines per https://codereview.chro
wala
2014/08/14 17:31:24
These aren't really necessary, so I've removed the
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| 7 ; RUN: %llvm2ice -Om1 --verbose none %s \ | |
| 8 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | |
| 9 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s | |
| 10 | |
| 11 ; The location of the stack slot for a variable is inferred from the | |
| 12 ; return sequence. | |
| 13 | |
| 14 define <4 x i32> @align_global_vector(i32 %arg) { | |
|
Jim Stichnoth
2014/08/13 23:59:34
Document the meaning of global versus local, other
wala
2014/08/14 17:31:24
Done.
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| 15 entry: | |
| 16 %vec1 = insertelement <4 x i32> undef, i32 %arg, i32 0 | |
| 17 br label %block | |
| 18 block: | |
| 19 call void @ForceSpill() | |
| 20 ret <4 x i32> %vec1 | |
| 21 ; CHECK-LABEL: align_global_vector: | |
| 22 ; CHECK: movups xmm0, xmmword ptr [esp] | |
| 23 ; CHECK-NEXT: add esp, 28 | |
| 24 ; CHECK-NEXT: ret | |
| 25 } | |
| 26 | |
| 27 define <4 x i32> @align_local_vector(i32 %arg) { | |
| 28 entry: | |
| 29 br label %block | |
| 30 block: | |
| 31 %vec1 = insertelement <4 x i32> undef, i32 %arg, i32 0 | |
| 32 call void @ForceSpill() | |
| 33 ret <4 x i32> %vec1 | |
| 34 ; CHECK-LABEL: align_local_vector: | |
| 35 ; CHECK: movups xmm0, xmmword ptr [esp] | |
| 36 ; CHECK-NEXT: add esp, 28 | |
| 37 ; CHECK-NEXT: ret | |
| 38 } | |
| 39 | |
| 40 declare void @ForceSpill() | |
| 41 | |
| 42 define <4 x i32> @align_global_vector_ebp_based(i32 %arg) { | |
| 43 entry: | |
| 44 %alloc = alloca i8, i32 1, align 1 | |
| 45 %vec1 = insertelement <4 x i32> undef, i32 %arg, i32 0 | |
| 46 br label %block | |
| 47 block: | |
| 48 call void @ForceSpillAndUse(i8* %alloc) | |
| 49 ret <4 x i32> %vec1 | |
| 50 ; CHECK-LABEL: align_global_vector_ebp_based: | |
| 51 ; CHECK: movups xmm0, xmmword ptr [ebp-24] | |
| 52 ; CHECK-NEXT: mov esp, ebp | |
| 53 ; CHECK-NEXT: pop ebp | |
| 54 ; CHECK: ret | |
| 55 } | |
| 56 | |
| 57 define <4 x i32> @align_local_vector_ebp_based(i32 %arg) { | |
| 58 entry: | |
| 59 %alloc = alloca i8, i32 1, align 1 | |
| 60 %vec1 = insertelement <4 x i32> undef, i32 %arg, i32 0 | |
| 61 call void @ForceSpillAndUse(i8* %alloc) | |
| 62 ret <4 x i32> %vec1 | |
| 63 ; CHECK-LABEL: align_local_vector_ebp_based: | |
| 64 ; CHECK: movups xmm0, xmmword ptr [ebp-24] | |
| 65 ; CHECK-NEXT: mov esp, ebp | |
| 66 ; CHECK-NEXT: pop ebp | |
| 67 ; CHECK: ret | |
| 68 } | |
| 69 | |
| 70 declare void @ForceSpillAndUse(i8*) | |
| 71 | |
| 72 ; ERRORS-NOT: ICE translation error | |
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