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Issue 464016: Fix for bug 512 from Subrato De, CodeAurora. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 11 years ago
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1 // Copyright 2009 the V8 project authors. All rights reserved. 1 // Copyright 2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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1886 set_register(rd, halfword); 1886 set_register(rd, halfword);
1887 } else { 1887 } else {
1888 Debugger dbg(this); 1888 Debugger dbg(this);
1889 dbg.Stop(instr); 1889 dbg.Stop(instr);
1890 } 1890 }
1891 } 1891 }
1892 1892
1893 1893
1894 // void Simulator::DecodeTypeVFP(Instr* instr) 1894 // void Simulator::DecodeTypeVFP(Instr* instr)
1895 // The Following ARMv7 VFPv instructions are currently supported. 1895 // The Following ARMv7 VFPv instructions are currently supported.
1896 // fmsr :Sn = Rt 1896 // vmov :Sn = Rt
1897 // fmrs :Rt = Sn 1897 // vmov :Rt = Sn
1898 // fsitod: Dd = Sm 1898 // vcvt: Dd = Sm
1899 // ftosid: Sd = Dm 1899 // vcvt: Sd = Dm
1900 // Dd = faddd(Dn, Dm) 1900 // Dd = vadd(Dn, Dm)
1901 // Dd = fsubd(Dn, Dm) 1901 // Dd = vsub(Dn, Dm)
1902 // Dd = fmuld(Dn, Dm) 1902 // Dd = vmul(Dn, Dm)
1903 // Dd = fdivd(Dn, Dm) 1903 // Dd = vdiv(Dn, Dm)
1904 // vcmp(Dd, Dm) 1904 // vcmp(Dd, Dm)
1905 // VMRS 1905 // VMRS
1906 void Simulator::DecodeTypeVFP(Instr* instr) { 1906 void Simulator::DecodeTypeVFP(Instr* instr) {
1907 ASSERT((instr->TypeField() == 7) && (instr->Bit(24) == 0x0) ); 1907 ASSERT((instr->TypeField() == 7) && (instr->Bit(24) == 0x0) );
1908 1908
1909 int rt = instr->RtField(); 1909 int rt = instr->RtField();
1910 int vm = instr->VmField(); 1910 int vm = instr->VmField();
1911 int vn = instr->VnField(); 1911 int vn = instr->VnField();
1912 int vd = instr->VdField(); 1912 int vd = instr->VdField();
1913 1913
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2013 set_register(rt, int_value); 2013 set_register(rt, int_value);
2014 } else { 2014 } else {
2015 UNIMPLEMENTED(); // Not used by V8. 2015 UNIMPLEMENTED(); // Not used by V8.
2016 } 2016 }
2017 } 2017 }
2018 } 2018 }
2019 2019
2020 2020
2021 // void Simulator::DecodeType6CoprocessorIns(Instr* instr) 2021 // void Simulator::DecodeType6CoprocessorIns(Instr* instr)
2022 // Decode Type 6 coprocessor instructions. 2022 // Decode Type 6 coprocessor instructions.
2023 // Dm = fmdrr(Rt, Rt2) 2023 // Dm = vmov(Rt, Rt2)
2024 // <Rt, Rt2> = fmrrd(Dm) 2024 // <Rt, Rt2> = vmov(Dm)
2025 void Simulator::DecodeType6CoprocessorIns(Instr* instr) { 2025 void Simulator::DecodeType6CoprocessorIns(Instr* instr) {
2026 ASSERT((instr->TypeField() == 6)); 2026 ASSERT((instr->TypeField() == 6));
2027 2027
2028 int rt = instr->RtField(); 2028 int rt = instr->RtField();
2029 int rn = instr->RnField(); 2029 int rn = instr->RnField();
2030 int vm = instr->VmField(); 2030 int vm = instr->VmField();
2031 2031
2032 if (instr->Bit(23) == 1) { 2032 if (instr->Bit(23) == 1) {
2033 UNIMPLEMENTED(); 2033 UNIMPLEMENTED();
2034 } else if (instr->Bit(22) == 1) { 2034 } else if (instr->Bit(22) == 1) {
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2255 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); 2255 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
2256 uintptr_t address = *stack_slot; 2256 uintptr_t address = *stack_slot;
2257 set_register(sp, current_sp + sizeof(uintptr_t)); 2257 set_register(sp, current_sp + sizeof(uintptr_t));
2258 return address; 2258 return address;
2259 } 2259 }
2260 2260
2261 2261
2262 } } // namespace assembler::arm 2262 } } // namespace assembler::arm
2263 2263
2264 #endif // !defined(__arm__) 2264 #endif // !defined(__arm__)
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