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Issue 464016: Fix for bug 512 from Subrato De, CodeAurora. (Closed) Base URL: http://v8.googlecode.com/svn/branches/bleeding_edge/
Patch Set: '' Created 11 years ago
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1 // Copyright 2006-2009 the V8 project authors. All rights reserved. 1 // Copyright 2006-2009 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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5054 // r0, r1, r2, r3 are the double representations of the left hand side 5054 // r0, r1, r2, r3 are the double representations of the left hand side
5055 // and the right hand side. 5055 // and the right hand side.
5056 5056
5057 // Checks for NaN in the doubles we have loaded. Can return the answer or 5057 // Checks for NaN in the doubles we have loaded. Can return the answer or
5058 // fall through if neither is a NaN. Also binds rhs_not_nan. 5058 // fall through if neither is a NaN. Also binds rhs_not_nan.
5059 EmitNanCheck(masm, &rhs_not_nan, cc_); 5059 EmitNanCheck(masm, &rhs_not_nan, cc_);
5060 5060
5061 if (CpuFeatures::IsSupported(VFP3)) { 5061 if (CpuFeatures::IsSupported(VFP3)) {
5062 CpuFeatures::Scope scope(VFP3); 5062 CpuFeatures::Scope scope(VFP3);
5063 // ARMv7 VFP3 instructions to implement double precision comparison. 5063 // ARMv7 VFP3 instructions to implement double precision comparison.
5064 __ fmdrr(d6, r0, r1); 5064 __ vmov(d6, r0, r1);
5065 __ fmdrr(d7, r2, r3); 5065 __ vmov(d7, r2, r3);
5066 5066
5067 __ fcmp(d6, d7); 5067 __ vcmp(d6, d7);
5068 __ vmrs(pc); 5068 __ vmrs(pc);
5069 __ mov(r0, Operand(0), LeaveCC, eq); 5069 __ mov(r0, Operand(0), LeaveCC, eq);
5070 __ mov(r0, Operand(1), LeaveCC, lt); 5070 __ mov(r0, Operand(1), LeaveCC, lt);
5071 __ mvn(r0, Operand(0), LeaveCC, gt); 5071 __ mvn(r0, Operand(0), LeaveCC, gt);
5072 __ mov(pc, Operand(lr)); 5072 __ mov(pc, Operand(lr));
5073 } else { 5073 } else {
5074 // Compares two doubles in r0, r1, r2, r3 that are not NaNs. Returns the 5074 // Compares two doubles in r0, r1, r2, r3 that are not NaNs. Returns the
5075 // answer. Never falls through. 5075 // answer. Never falls through.
5076 EmitTwoNonNanDoubleComparison(masm, cc_); 5076 EmitTwoNonNanDoubleComparison(masm, cc_);
5077 } 5077 }
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5324 // r5: Address of heap number for result. 5324 // r5: Address of heap number for result.
5325 5325
5326 if (CpuFeatures::IsSupported(VFP3) && 5326 if (CpuFeatures::IsSupported(VFP3) &&
5327 ((Token::MUL == operation) || 5327 ((Token::MUL == operation) ||
5328 (Token::DIV == operation) || 5328 (Token::DIV == operation) ||
5329 (Token::ADD == operation) || 5329 (Token::ADD == operation) ||
5330 (Token::SUB == operation))) { 5330 (Token::SUB == operation))) {
5331 CpuFeatures::Scope scope(VFP3); 5331 CpuFeatures::Scope scope(VFP3);
5332 // ARMv7 VFP3 instructions to implement 5332 // ARMv7 VFP3 instructions to implement
5333 // double precision, add, subtract, multiply, divide. 5333 // double precision, add, subtract, multiply, divide.
5334 __ fmdrr(d6, r0, r1); 5334 __ vmov(d6, r0, r1);
5335 __ fmdrr(d7, r2, r3); 5335 __ vmov(d7, r2, r3);
5336 5336
5337 if (Token::MUL == operation) { 5337 if (Token::MUL == operation) {
5338 __ fmuld(d5, d6, d7); 5338 __ vmul(d5, d6, d7);
5339 } else if (Token::DIV == operation) { 5339 } else if (Token::DIV == operation) {
5340 __ fdivd(d5, d6, d7); 5340 __ vdiv(d5, d6, d7);
5341 } else if (Token::ADD == operation) { 5341 } else if (Token::ADD == operation) {
5342 __ faddd(d5, d6, d7); 5342 __ vadd(d5, d6, d7);
5343 } else if (Token::SUB == operation) { 5343 } else if (Token::SUB == operation) {
5344 __ fsubd(d5, d6, d7); 5344 __ vsub(d5, d6, d7);
5345 } else { 5345 } else {
5346 UNREACHABLE(); 5346 UNREACHABLE();
5347 } 5347 }
5348 5348
5349 __ fmrrd(r0, r1, d5); 5349 __ vmov(r0, r1, d5);
5350 5350
5351 __ str(r0, FieldMemOperand(r5, HeapNumber::kValueOffset)); 5351 __ str(r0, FieldMemOperand(r5, HeapNumber::kValueOffset));
5352 __ str(r1, FieldMemOperand(r5, HeapNumber::kValueOffset + 4)); 5352 __ str(r1, FieldMemOperand(r5, HeapNumber::kValueOffset + 4));
5353 __ mov(r0, Operand(r5)); 5353 __ mov(r0, Operand(r5));
5354 __ mov(pc, lr); 5354 __ mov(pc, lr);
5355 return; 5355 return;
5356 } 5356 }
5357 __ push(lr); // For later. 5357 __ push(lr); // For later.
5358 __ push(r5); // Address of heap number that is answer. 5358 __ push(r5); // Address of heap number that is answer.
5359 __ AlignStack(0); 5359 __ AlignStack(0);
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5428 // We now have the exponent in dest. Subtract from 30 to get 5428 // We now have the exponent in dest. Subtract from 30 to get
5429 // how much to shift down. 5429 // how much to shift down.
5430 __ rsb(dest, dest, Operand(30)); 5430 __ rsb(dest, dest, Operand(30));
5431 } 5431 }
5432 __ bind(&right_exponent); 5432 __ bind(&right_exponent);
5433 if (CpuFeatures::IsSupported(VFP3)) { 5433 if (CpuFeatures::IsSupported(VFP3)) {
5434 CpuFeatures::Scope scope(VFP3); 5434 CpuFeatures::Scope scope(VFP3);
5435 // ARMv7 VFP3 instructions implementing double precision to integer 5435 // ARMv7 VFP3 instructions implementing double precision to integer
5436 // conversion using round to zero. 5436 // conversion using round to zero.
5437 __ ldr(scratch2, FieldMemOperand(source, HeapNumber::kMantissaOffset)); 5437 __ ldr(scratch2, FieldMemOperand(source, HeapNumber::kMantissaOffset));
5438 __ fmdrr(d7, scratch2, scratch); 5438 __ vmov(d7, scratch2, scratch);
5439 __ ftosid(s15, d7); 5439 __ vcvt(s15, d7);
5440 __ fmrs(dest, s15); 5440 __ vmov(dest, s15);
5441 } else { 5441 } else {
5442 // Get the top bits of the mantissa. 5442 // Get the top bits of the mantissa.
5443 __ and_(scratch2, scratch, Operand(HeapNumber::kMantissaMask)); 5443 __ and_(scratch2, scratch, Operand(HeapNumber::kMantissaMask));
5444 // Put back the implicit 1. 5444 // Put back the implicit 1.
5445 __ orr(scratch2, scratch2, Operand(1 << HeapNumber::kExponentShift)); 5445 __ orr(scratch2, scratch2, Operand(1 << HeapNumber::kExponentShift));
5446 // Shift up the mantissa bits to take up the space the exponent used to 5446 // Shift up the mantissa bits to take up the space the exponent used to
5447 // take. We just orred in the implicit bit so that took care of one and 5447 // take. We just orred in the implicit bit so that took care of one and
5448 // we want to leave the sign bit 0 so we subtract 2 bits from the shift 5448 // we want to leave the sign bit 0 so we subtract 2 bits from the shift
5449 // distance. 5449 // distance.
5450 const int shift_distance = HeapNumber::kNonMantissaBitsInTopWord - 2; 5450 const int shift_distance = HeapNumber::kNonMantissaBitsInTopWord - 2;
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6559 int CompareStub::MinorKey() { 6559 int CompareStub::MinorKey() {
6560 // Encode the two parameters in a unique 16 bit value. 6560 // Encode the two parameters in a unique 16 bit value.
6561 ASSERT(static_cast<unsigned>(cc_) >> 28 < (1 << 15)); 6561 ASSERT(static_cast<unsigned>(cc_) >> 28 < (1 << 15));
6562 return (static_cast<unsigned>(cc_) >> 27) | (strict_ ? 1 : 0); 6562 return (static_cast<unsigned>(cc_) >> 27) | (strict_ ? 1 : 0);
6563 } 6563 }
6564 6564
6565 6565
6566 #undef __ 6566 #undef __
6567 6567
6568 } } // namespace v8::internal 6568 } } // namespace v8::internal
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