Subzero: Randomly insert nops.

src/IceTargetLowering.h

 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the TargetLowering and LoweringContext
@@ skipping 103 matching lines @@
   }
   virtual void translateO1() {
     Func->setError("Target doesn't specify O1 lowering steps.");
   }
   virtual void translateO2() {
     Func->setError("Target doesn't specify O2 lowering steps.");
   }
 
   // Tries to do address mode optimization on a single instruction.
   void doAddressOpt();
+  // Randomly insert NOPs.
+  void doNopInsertion();
   // Lowers a single instruction.
   void lower();
 
   // Returns a variable pre-colored to the specified physical
   // register.  This is generally used to get very direct access to
   // the register such as in the prolog or epilog or for marking
   // scratch registers as killed by a call.
   virtual Variable *getPhysicalRegister(SizeT RegNum) = 0;
   // Returns a printable name for the register.
   virtual IceString getRegName(SizeT RegNum, Type Ty) const = 0;
 
   virtual bool hasFramePointer() const { return false; }
   virtual SizeT getFrameOrStackReg() const = 0;
   virtual size_t typeWidthInBytesOnStack(Type Ty) const = 0;
   bool hasComputedFrame() const { return HasComputedFrame; }
+  bool shouldDoNopInsertion() const;
   int32_t getStackAdjustment() const { return StackAdjustment; }
   void updateStackAdjustment(int32_t Offset) { StackAdjustment += Offset; }
   void resetStackAdjustment() { StackAdjustment = 0; }
   LoweringContext &getContext() { return Context; }
 
   enum RegSet {
     RegSet_None = 0,
     RegSet_CallerSave = 1 << 0,
     RegSet_CalleeSave = 1 << 1,
     RegSet_StackPointer = 1 << 2,
@@ skipping 37 matching lines @@
   virtual void lowerLoad(const InstLoad *Inst) = 0;
   virtual void lowerPhi(const InstPhi *Inst) = 0;
   virtual void lowerRet(const InstRet *Inst) = 0;
   virtual void lowerSelect(const InstSelect *Inst) = 0;
   virtual void lowerStore(const InstStore *Inst) = 0;
   virtual void lowerSwitch(const InstSwitch *Inst) = 0;
   virtual void lowerUnreachable(const InstUnreachable *Inst) = 0;
 
   virtual void doAddressOptLoad() {}
   virtual void doAddressOptStore() {}
+  virtual void randomlyInsertNop(float Probability) = 0;
   // This gives the target an opportunity to post-process the lowered
   // expansion before returning.  The primary intention is to do some
   // Register Manager activity as necessary, specifically to eagerly
   // allocate registers based on affinity and other factors.  The
   // simplest lowering does nothing here and leaves it all to a
   // subsequent global register allocation pass.
   virtual void postLower() {}
 
   Cfg *Func;
   GlobalContext *Ctx;
@@ skipping 29 matching lines @@
 private:
   TargetGlobalInitLowering(const TargetGlobalInitLowering &)
   LLVM_DELETED_FUNCTION;
   TargetGlobalInitLowering &
   operator=(const TargetGlobalInitLowering &) LLVM_DELETED_FUNCTION;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERING_H