Revert "Reland "MIPS: Add support for arch. revision 6 to mips32 port.""

src/mips/macro-assembler-mips.h

Index: src/mips/macro-assembler-mips.h
diff --git a/src/mips/macro-assembler-mips.h b/src/mips/macro-assembler-mips.h
index b8c881a2e742b853a5181ee75edf4ac1d6dbd3c5..c67d7fe149b8158cb6d8a179ad3ec54b41d29141 100644
--- a/src/mips/macro-assembler-mips.h
+++ b/src/mips/macro-assembler-mips.h
@@ -234,11 +234,11 @@ class MacroAssembler: public Assembler {
 
   inline void Move(Register dst_low, Register dst_high, FPURegister src) {
     mfc1(dst_low, src);
-    Mfhc1(dst_high, src);
+    mfc1(dst_high, FPURegister::from_code(src.code() + 1));
   }
 
   inline void FmoveHigh(Register dst_high, FPURegister src) {
-    Mfhc1(dst_high, src);
+    mfc1(dst_high, FPURegister::from_code(src.code() + 1));
   }
 
   inline void FmoveLow(Register dst_low, FPURegister src) {
@@ -247,7 +247,7 @@ class MacroAssembler: public Assembler {
 
   inline void Move(FPURegister dst, Register src_low, Register src_high) {
     mtc1(src_low, dst);
-    Mthc1(src_high, dst);
+    mtc1(src_high, FPURegister::from_code(dst.code() + 1));
   }
 
   // Conditional move.
@@ -582,28 +582,14 @@ class MacroAssembler: public Assembler {
     instr(rs, Operand(j));                                                     \
   }
 
-#define DEFINE_INSTRUCTION3(instr)                                             \
-  void instr(Register rd_hi, Register rd_lo, Register rs, const Operand& rt);  \
-  void instr(Register rd_hi, Register rd_lo, Register rs, Register rt) {       \
-    instr(rd_hi, rd_lo, rs, Operand(rt));                                      \
-  }                                                                            \
-  void instr(Register rd_hi, Register rd_lo, Register rs, int32_t j) {         \
-    instr(rd_hi, rd_lo, rs, Operand(j));                                       \
-  }
-
   DEFINE_INSTRUCTION(Addu);
   DEFINE_INSTRUCTION(Subu);
   DEFINE_INSTRUCTION(Mul);
-  DEFINE_INSTRUCTION(Mod);
-  DEFINE_INSTRUCTION(Mulh);
   DEFINE_INSTRUCTION2(Mult);
   DEFINE_INSTRUCTION2(Multu);
   DEFINE_INSTRUCTION2(Div);
   DEFINE_INSTRUCTION2(Divu);
 
-  DEFINE_INSTRUCTION3(Div);
-  DEFINE_INSTRUCTION3(Mul);
-
   DEFINE_INSTRUCTION(And);
   DEFINE_INSTRUCTION(Or);
   DEFINE_INSTRUCTION(Xor);
@@ -756,20 +742,6 @@ class MacroAssembler: public Assembler {
   void Round_w_d(FPURegister fd, FPURegister fs);
   void Floor_w_d(FPURegister fd, FPURegister fs);
   void Ceil_w_d(FPURegister fd, FPURegister fs);
-
-  // FP32 mode: Move the general purpose register into
-  // the high part of the double-register pair.
-  // FP64 mode: Move the general-purpose register into
-  // the higher 32 bits of the 64-bit coprocessor register,
-  // while leaving the low bits unchanged.
-  void Mthc1(Register rt, FPURegister fs);
-
-  // FP32 mode: move the high part of the double-register pair into
-  // general purpose register.
-  // FP64 mode: Move the higher 32 bits of the 64-bit coprocessor register into
-  // general-purpose register.
-  void Mfhc1(Register rt, FPURegister fs);
-
   // Wrapper function for the different cmp/branch types.
   void BranchF(Label* target,
                Label* nan,