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Unified Diff: src/base/cpu.cc

Issue 458983003: Revert "Reland "MIPS: Add support for arch. revision 6 to mips32 port."" (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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Index: src/base/cpu.cc
diff --git a/src/base/cpu.cc b/src/base/cpu.cc
index 272fd53389dbc621fdd3c723d3fc9b152b05090f..adce69d4579156f9b63a16beb6ffa520619f4a00 100644
--- a/src/base/cpu.cc
+++ b/src/base/cpu.cc
@@ -115,30 +115,6 @@ static uint32_t ReadELFHWCaps() {
#endif // V8_HOST_ARCH_ARM
-#if V8_HOST_ARCH_MIPS
-int __detect_fp64_mode(void) {
- double result = 0;
- // Bit representation of (double)1 is 0x3FF0000000000000.
- asm(
- "lui $t0, 0x3FF0\n\t"
- "ldc1 $f0, %0\n\t"
- "mtc1 $t0, $f1\n\t"
- "sdc1 $f0, %0\n\t"
- : "+m" (result)
- : : "t0", "$f0", "$f1", "memory");
-
- return !(result == 1);
-}
-
-
-int __detect_mips_arch_revision(void) {
- // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips
- // kernel. Currently fail-back to the least common denominator which is
- // mips32 revision 1.
- return 1;
-}
-#endif
-
// Extract the information exposed by the kernel via /proc/cpuinfo.
class CPUInfo V8_FINAL {
public:
@@ -490,10 +466,6 @@ CPU::CPU() : stepping_(0),
char* cpu_model = cpu_info.ExtractField("cpu model");
has_fpu_ = HasListItem(cpu_model, "FPU");
delete[] cpu_model;
-#ifdef V8_HOST_ARCH_MIPS
- is_fp64_mode_ = __detect_fp64_mode();
- architecture_ = __detect_mips_arch_revision();
-#endif
#elif V8_HOST_ARCH_ARM64
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