Index: build/toolchain.gypi |
diff --git a/build/toolchain.gypi b/build/toolchain.gypi |
index 1d47360d2a7aae6d103b5abe33ef3f8620921f6c..a31d8486def92160f163eb26a7fbdff646ad1a15 100644 |
--- a/build/toolchain.gypi |
+++ b/build/toolchain.gypi |
@@ -58,6 +58,14 @@ |
# Default arch variant for MIPS. |
'mips_arch_variant%': 'r2', |
+ # Possible values fp32, fp64, fpxx. |
+ # fp32 - 32 32-bit FPU registers are available, doubles are placed in |
+ # register pairs. |
+ # fp64 - 32 64-bit FPU registers are available. |
+ # fpxx - compatibility mode, it chooses fp32 or fp64 depending on runtime |
+ # detection |
+ 'mips_fpu_mode%': 'fp32', |
+ |
'v8_enable_backtrace%': 0, |
# Enable profiling support. Only required on Windows. |
@@ -272,10 +280,33 @@ |
'cflags': ['-msoft-float'], |
'ldflags': ['-msoft-float'], |
}], |
+ ['mips_fpu_mode=="fp64"', { |
+ 'cflags': ['-mfp64'], |
+ }], |
+ ['mips_fpu_mode=="fpxx"', { |
+ 'cflags': ['-mfpxx'], |
+ }], |
+ ['mips_fpu_mode=="fp32"', { |
+ 'cflags': ['-mfp32'], |
+ }], |
+ ['mips_arch_variant=="r6"', { |
+ 'cflags!': ['-mfp32'], |
+ 'cflags': ['-mips32r6', '-Wa,-mips32r6'], |
+ 'ldflags': [ |
+ '-mips32r6', |
+ '-Wl,--dynamic-linker=$(LDSO_PATH)', |
+ '-Wl,--rpath=$(LD_R_PATH)', |
+ ], |
+ }], |
['mips_arch_variant=="r2"', { |
'cflags': ['-mips32r2', '-Wa,-mips32r2'], |
}], |
['mips_arch_variant=="r1"', { |
+ 'cflags!': ['-mfp64'], |
+ 'cflags': ['-mips32', '-Wa,-mips32'], |
+ }], |
+ ['mips_arch_variant=="rx"', { |
+ 'cflags!': ['-mfp64'], |
'cflags': ['-mips32', '-Wa,-mips32'], |
}], |
], |
@@ -297,8 +328,29 @@ |
'__mips_soft_float=1' |
], |
}], |
+ ['mips_arch_variant=="rx"', { |
+ 'defines': ['_MIPS_ARCH_MIPS32RX',], |
+ 'defines': ['FPU_MODE_FPXX',], |
+ }], |
+ ['mips_arch_variant=="r6"', { |
+ 'defines': ['_MIPS_ARCH_MIPS32R6', 'FPU_MODE_FP64',], |
+ }], |
['mips_arch_variant=="r2"', { |
'defines': ['_MIPS_ARCH_MIPS32R2',], |
+ 'conditions': [ |
+ ['mips_fpu_mode=="fp64"', { |
+ 'defines': ['FPU_MODE_FP64',], |
+ }], |
+ ['mips_fpu_mode=="fpxx"', { |
+ 'defines': ['FPU_MODE_FPXX',], |
+ }], |
+ ['mips_fpu_mode=="fp32"', { |
+ 'defines': ['FPU_MODE_FP32',], |
+ }], |
+ ], |
+ }], |
+ ['mips_arch_variant=="r1"', { |
+ 'defines': ['FPU_MODE_FP32',], |
}], |
], |
}], # v8_target_arch=="mips" |
@@ -321,13 +373,37 @@ |
'cflags': ['-msoft-float'], |
'ldflags': ['-msoft-float'], |
}], |
+ ['mips_fpu_mode=="fp64"', { |
+ 'cflags': ['-mfp64'], |
+ }], |
+ ['mips_fpu_mode=="fpxx"', { |
+ 'cflags': ['-mfpxx'], |
+ }], |
+ ['mips_fpu_mode=="fp32"', { |
+ 'cflags': ['-mfp32'], |
+ }], |
+ ['mips_arch_variant=="r6"', { |
+ 'cflags!': ['-mfp32'], |
+ 'cflags': ['-mips32r6', '-Wa,-mips32r6'], |
+ 'ldflags': [ |
+ '-mips32r6', |
+ '-Wl,--dynamic-linker=$(LDSO_PATH)', |
+ '-Wl,--rpath=$(LD_R_PATH)', |
+ ], |
+ }], |
['mips_arch_variant=="r2"', { |
'cflags': ['-mips32r2', '-Wa,-mips32r2'], |
}], |
['mips_arch_variant=="r1"', { |
+ 'cflags!': ['-mfp64'], |
+ 'cflags': ['-mips32', '-Wa,-mips32'], |
+ }], |
+ ['mips_arch_variant=="rx"', { |
+ 'cflags!': ['-mfp64'], |
'cflags': ['-mips32', '-Wa,-mips32'], |
- }], |
+ }], |
['mips_arch_variant=="loongson"', { |
+ 'cflags!': ['-mfp64'], |
'cflags': ['-mips3', '-Wa,-mips3'], |
}], |
], |
@@ -349,11 +425,33 @@ |
'__mips_soft_float=1' |
], |
}], |
+ ['mips_arch_variant=="rx"', { |
+ 'defines': ['_MIPS_ARCH_MIPS32RX',], |
+ 'defines': ['FPU_MODE_FPXX',], |
+ }], |
+ ['mips_arch_variant=="r6"', { |
+ 'defines': ['_MIPS_ARCH_MIPS32R6', 'FPU_MODE_FP64',], |
+ }], |
['mips_arch_variant=="r2"', { |
'defines': ['_MIPS_ARCH_MIPS32R2',], |
+ 'conditions': [ |
+ ['mips_fpu_mode=="fp64"', { |
+ 'defines': ['FPU_MODE_FP64',], |
+ }], |
+ ['mips_fpu_mode=="fpxx"', { |
+ 'defines': ['FPU_MODE_FPXX',], |
+ }], |
+ ['mips_fpu_mode=="fp32"', { |
+ 'defines': ['FPU_MODE_FP32',], |
+ }], |
+ ], |
+ }], |
+ ['mips_arch_variant=="r1"', { |
+ 'defines': ['FPU_MODE_FP32',], |
}], |
['mips_arch_variant=="loongson"', { |
'defines': ['_MIPS_ARCH_LOONGSON',], |
+ 'defines': ['FPU_MODE_FP32',], |
}], |
], |
}], # v8_target_arch=="mipsel" |