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Issue 456033003: Subzero: Randomize register assignment. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: Typo Created 6 years, 4 months ago
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1 //===- subzero/src/llvm2ice.cpp - Driver for testing ----------------------===// 1 //===- subzero/src/llvm2ice.cpp - Driver for testing ----------------------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 // 9 //
10 // This file defines a driver that uses LLVM capabilities to parse a 10 // This file defines a driver that uses LLVM capabilities to parse a
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38 clEnumValN(Ice::IceV_InstNumbers, "instnum", 38 clEnumValN(Ice::IceV_InstNumbers, "instnum",
39 "Print instruction numbers"), 39 "Print instruction numbers"),
40 clEnumValN(Ice::IceV_Preds, "pred", "Show predecessors"), 40 clEnumValN(Ice::IceV_Preds, "pred", "Show predecessors"),
41 clEnumValN(Ice::IceV_Succs, "succ", "Show successors"), 41 clEnumValN(Ice::IceV_Succs, "succ", "Show successors"),
42 clEnumValN(Ice::IceV_Liveness, "live", "Liveness information"), 42 clEnumValN(Ice::IceV_Liveness, "live", "Liveness information"),
43 clEnumValN(Ice::IceV_RegManager, "rmgr", "Register manager status"), 43 clEnumValN(Ice::IceV_RegManager, "rmgr", "Register manager status"),
44 clEnumValN(Ice::IceV_RegOrigins, "orig", "Physical register origins"), 44 clEnumValN(Ice::IceV_RegOrigins, "orig", "Physical register origins"),
45 clEnumValN(Ice::IceV_LinearScan, "regalloc", "Linear scan details"), 45 clEnumValN(Ice::IceV_LinearScan, "regalloc", "Linear scan details"),
46 clEnumValN(Ice::IceV_Frame, "frame", "Stack frame layout details"), 46 clEnumValN(Ice::IceV_Frame, "frame", "Stack frame layout details"),
47 clEnumValN(Ice::IceV_Timing, "time", "Pass timing details"), 47 clEnumValN(Ice::IceV_Timing, "time", "Pass timing details"),
48 clEnumValN(Ice::IceV_Random, "random", "Randomization details"),
48 clEnumValN(Ice::IceV_All, "all", "Use all verbose options"), 49 clEnumValN(Ice::IceV_All, "all", "Use all verbose options"),
49 clEnumValN(Ice::IceV_None, "none", "No verbosity"), clEnumValEnd)); 50 clEnumValN(Ice::IceV_None, "none", "No verbosity"), clEnumValEnd));
50 static cl::opt<Ice::TargetArch> TargetArch( 51 static cl::opt<Ice::TargetArch> TargetArch(
51 "target", cl::desc("Target architecture:"), cl::init(Ice::Target_X8632), 52 "target", cl::desc("Target architecture:"), cl::init(Ice::Target_X8632),
52 cl::values( 53 cl::values(
53 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"), 54 clEnumValN(Ice::Target_X8632, "x8632", "x86-32"),
54 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"), 55 clEnumValN(Ice::Target_X8632, "x86-32", "x86-32 (same as x8632)"),
55 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"), 56 clEnumValN(Ice::Target_X8632, "x86_32", "x86-32 (same as x8632)"),
56 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"), 57 clEnumValN(Ice::Target_X8664, "x8664", "x86-64"),
57 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"), 58 clEnumValN(Ice::Target_X8664, "x86-64", "x86-64 (same as x8664)"),
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158 if (!Mod) { 159 if (!Mod) {
159 Err.print(argv[0], errs()); 160 Err.print(argv[0], errs());
160 return 1; 161 return 1;
161 } 162 }
162 163
163 Ice::Converter Converter(&Ctx); 164 Ice::Converter Converter(&Ctx);
164 Converter.convertToIce(Mod); 165 Converter.convertToIce(Mod);
165 return Converter.getErrorStatus(); 166 return Converter.getErrorStatus();
166 } 167 }
167 } 168 }
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