Subzero: Randomize register assignment.

src/IceTargetLowering.h

 //===- subzero/src/IceTargetLowering.h - Lowering interface -----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file declares the TargetLowering and LoweringContext
@@ skipping 138 matching lines @@
     RegSet_FramePointer = 1 << 3,
     RegSet_All = ~RegSet_None
   };
   typedef uint32_t RegSetMask;
 
   virtual llvm::SmallBitVector getRegisterSet(RegSetMask Include,
                                               RegSetMask Exclude) const = 0;
   virtual const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const = 0;
   void regAlloc();
 
+  typedef std::vector<int32_t> RegisterPermutation;

[JF, 2014/08/12 05:27:00]

What's the expected size of this vector? Shouldn't it be ~ number of registers?
If so the that should be a SmallVector.

[wala, 2014/08/15 03:37:23]

Done.

+  virtual void makeRandomRegisterPermutation(RegisterPermutation &Permutation,

[Jim Stichnoth, 2014/08/14 01:10:29]

Can this method be const?

[wala, 2014/08/15 03:37:23]

It changes the state of the RNG, so I wouldn't make it const.

+      const llvm::SmallBitVector &ExcludeRegisters) = 0;
+
   virtual void emitVariable(const Variable *Var, const Cfg *Func) const = 0;
 
   // Performs target-specific argument lowering.
   virtual void lowerArguments() = 0;
 
   virtual void addProlog(CfgNode *Node) = 0;
   virtual void addEpilog(CfgNode *Node) = 0;
 
   virtual void emitConstants() const = 0;
 
@@ skipping 66 matching lines @@
 private:
   TargetGlobalInitLowering(const TargetGlobalInitLowering &)
   LLVM_DELETED_FUNCTION;
   TargetGlobalInitLowering &
   operator=(const TargetGlobalInitLowering &) LLVM_DELETED_FUNCTION;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERING_H