MIPS: Add support for arch. revision 6 to mips32 port.

src/base/cpu.cc

Index: src/base/cpu.cc
diff --git a/src/base/cpu.cc b/src/base/cpu.cc
index adce69d4579156f9b63a16beb6ffa520619f4a00..272fd53389dbc621fdd3c723d3fc9b152b05090f 100644
--- a/src/base/cpu.cc
+++ b/src/base/cpu.cc
@@ -115,6 +115,30 @@ static uint32_t ReadELFHWCaps() {
 
 #endif  // V8_HOST_ARCH_ARM
 
+#if V8_HOST_ARCH_MIPS
+int __detect_fp64_mode(void) {
+  double result = 0;
+  // Bit representation of (double)1 is 0x3FF0000000000000.
+  asm(
+    "lui $t0, 0x3FF0\n\t"
+    "ldc1 $f0, %0\n\t"
+    "mtc1 $t0, $f1\n\t"
+    "sdc1 $f0, %0\n\t"
+    : "+m" (result)
+    : : "t0", "$f0", "$f1", "memory");
+
+  return !(result == 1);
+}
+
+
+int __detect_mips_arch_revision(void) {
+  // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips
+  // kernel. Currently fail-back to the least common denominator which is
+  // mips32 revision 1.
+  return 1;
+}
+#endif
+
 // Extract the information exposed by the kernel via /proc/cpuinfo.
 class CPUInfo V8_FINAL {
  public:
@@ -466,6 +490,10 @@ CPU::CPU() : stepping_(0),
   char* cpu_model = cpu_info.ExtractField("cpu model");
   has_fpu_ = HasListItem(cpu_model, "FPU");
   delete[] cpu_model;
+#ifdef V8_HOST_ARCH_MIPS
+  is_fp64_mode_ = __detect_fp64_mode();
+  architecture_ = __detect_mips_arch_revision();
+#endif
 
 #elif V8_HOST_ARCH_ARM64