Index: tests_lit/llvm2ice_tests/alloc.ll |
diff --git a/tests_lit/llvm2ice_tests/alloc.ll b/tests_lit/llvm2ice_tests/alloc.ll |
index 2b92a87fb43a38efdc730d7305b14e07264f9df2..a1c08213b9c529d534c6e2d9b8a9c3b0d157bebb 100644 |
--- a/tests_lit/llvm2ice_tests/alloc.ll |
+++ b/tests_lit/llvm2ice_tests/alloc.ll |
@@ -1,8 +1,7 @@ |
-; This is a basic test of the alloca instruction - one test for alloca |
-; of a fixed size, and one test for variable size. |
+; This is a basic test of the alloca instruction. |
; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
-; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s |
+; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck %s |
; RUN: %llvm2ice -O2 --verbose none %s \ |
; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj |
; RUN: %llvm2ice -Om1 --verbose none %s \ |
@@ -12,45 +11,95 @@ |
; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
; RUN: | FileCheck --check-prefix=DUMP %s |
-define void @fixed_400(i32 %n) { |
+define void @fixed_416_align_16(i32 %n) { |
entry: |
- %array = alloca i8, i32 400, align 16 |
+ %array = alloca i8, i32 416, align 16 |
%__2 = ptrtoint i8* %array to i32 |
call void @f1(i32 %__2) |
ret void |
} |
-; CHECK: fixed_400: |
-; CHECK: sub esp, 400 |
-; CHECK-NEXT: mov eax, esp |
-; CHECK-NEXT: push eax |
-; CHECK-NEXT: call f1 |
-; |
-; OPTM1: fixed_400: |
-; OPTM1: sub esp, 400 |
-; OPTM1-NEXT: mov {{.*}}, esp |
-; OPTM1: push |
-; OPTM1-NEXT: call f1 |
+; CHECK-LABEL: fixed_416_align_16: |
+; CHECK: sub esp, 416 |
+; CHECK: sub esp, 16 |
+; CHECK: mov dword ptr [esp], eax |
+; CHECK: call f1 |
+ |
+define void @fixed_416_align_32(i32 %n) { |
+entry: |
+ %array = alloca i8, i32 400, align 32 |
+ %__2 = ptrtoint i8* %array to i32 |
+ call void @f1(i32 %__2) |
+ ret void |
+} |
+; CHECK-LABEL: fixed_416_align_32: |
+; CHECK: and esp, 4294967264 |
+; CHECK: sub esp, 416 |
+; CHECK: sub esp, 16 |
+; CHECK: mov dword ptr [esp], eax |
+; CHECK: call f1 |
+ |
+define void @fixed_351_align_16(i32 %n) { |
+entry: |
+ %array = alloca i8, i32 351, align 16 |
+ %__2 = ptrtoint i8* %array to i32 |
+ call void @f1(i32 %__2) |
+ ret void |
+} |
+; CHECK-LABEL: fixed_351_align_16: |
+; CHECK: sub esp, 352 |
+; CHECK: sub esp, 16 |
+; CHECK: mov dword ptr [esp], eax |
+; CHECK: call f1 |
+ |
+define void @fixed_351_align_32(i32 %n) { |
+entry: |
+ %array = alloca i8, i32 351, align 32 |
+ %__2 = ptrtoint i8* %array to i32 |
+ call void @f1(i32 %__2) |
+ ret void |
+} |
+; CHECK-LABEL: fixed_351_align_32: |
+; CHECK: and esp, 4294967264 |
+; CHECK: sub esp, 352 |
+; CHECK: sub esp, 16 |
+; CHECK: mov dword ptr [esp], eax |
+; CHECK: call f1 |
declare void @f1(i32) |
-define void @variable_n(i32 %n) { |
+define void @variable_n_align_16(i32 %n) { |
entry: |
%array = alloca i8, i32 %n, align 16 |
%__2 = ptrtoint i8* %array to i32 |
call void @f2(i32 %__2) |
ret void |
} |
-; CHECK: variable_n: |
+; CHECK-LABEL: variable_n_align_16: |
; CHECK: mov eax, dword ptr [ebp+8] |
-; CHECK-NEXT: sub esp, eax |
-; CHECK-NEXT: mov eax, esp |
-; CHECK-NEXT: push eax |
-; CHECK-NEXT: call f2 |
-; |
-; OPTM1: variable_n: |
-; OPTM1: mov {{.*}}, esp |
-; OPTM1: push |
-; OPTM1-NEXT: call f2 |
+; CHECK: add eax, 15 |
+; CHECK: and eax, 4294967280 |
+; CHECK: sub esp, eax |
+; CHECK: sub esp, 16 |
+; CHECK: mov dword ptr [esp], eax |
+; CHECK: call f2 |
+ |
+define void @variable_n_align_32(i32 %n) { |
+entry: |
+ %array = alloca i8, i32 %n, align 32 |
+ %__2 = ptrtoint i8* %array to i32 |
+ call void @f2(i32 %__2) |
+ ret void |
+} |
+; In -O2, the order of the CHECK-DAG lines in the output is switched. |
+; CHECK-LABEL: variable_n_align_32: |
+; CHECK-DAG: and esp, 4294967264 |
+; CHECK-DAG: mov eax, dword ptr [ebp+8] |
+; CHECK: add eax, 31 |
+; CHECK: and eax, 4294967264 |
+; CHECK: sub esp, eax |
+; CHECK: sub esp, 16 |
+; CHECK: mov dword ptr [esp], eax |
+; CHECK: call f2 |
declare void @f2(i32) |