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1 ; This is a basic test of the alloca instruction - one test for alloca | 1 ; This is a basic test of the alloca instruction. |
2 ; of a fixed size, and one test for variable size. | |
3 | 2 |
4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | 3 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
5 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s | 4 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck %s |
6 ; RUN: %llvm2ice -O2 --verbose none %s \ | 5 ; RUN: %llvm2ice -O2 --verbose none %s \ |
7 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | 6 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj |
8 ; RUN: %llvm2ice -Om1 --verbose none %s \ | 7 ; RUN: %llvm2ice -Om1 --verbose none %s \ |
9 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | 8 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj |
10 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s | 9 ; RUN: %llvm2ice --verbose none %s | FileCheck --check-prefix=ERRORS %s |
11 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s | 10 ; RUN: %llvm2iceinsts %s | %szdiff %s | FileCheck --check-prefix=DUMP %s |
12 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ | 11 ; RUN: %llvm2iceinsts --pnacl %s | %szdiff %s \ |
13 ; RUN: | FileCheck --check-prefix=DUMP %s | 12 ; RUN: | FileCheck --check-prefix=DUMP %s |
14 | 13 |
15 define void @fixed_400(i32 %n) { | 14 define void @fixed_416_align_16(i32 %n) { |
16 entry: | 15 entry: |
17 %array = alloca i8, i32 400, align 16 | 16 %array = alloca i8, i32 416, align 16 |
18 %__2 = ptrtoint i8* %array to i32 | 17 %__2 = ptrtoint i8* %array to i32 |
19 call void @f1(i32 %__2) | 18 call void @f1(i32 %__2) |
20 ret void | 19 ret void |
21 } | 20 } |
22 ; CHECK: fixed_400: | 21 ; CHECK-LABEL: fixed_416_align_16: |
23 ; CHECK: sub esp, 400 | 22 ; CHECK: sub esp, 416 |
24 ; CHECK-NEXT: mov eax, esp | 23 ; CHECK: sub esp, 16 |
25 ; CHECK-NEXT: push eax | 24 ; CHECK: mov dword ptr [esp], eax |
26 ; CHECK-NEXT: call f1 | 25 ; CHECK: call f1 |
27 ; | 26 |
28 ; OPTM1: fixed_400: | 27 define void @fixed_416_align_32(i32 %n) { |
29 ; OPTM1: sub esp, 400 | 28 entry: |
30 ; OPTM1-NEXT: mov {{.*}}, esp | 29 %array = alloca i8, i32 400, align 32 |
31 ; OPTM1: push | 30 %__2 = ptrtoint i8* %array to i32 |
32 ; OPTM1-NEXT: call f1 | 31 call void @f1(i32 %__2) |
| 32 ret void |
| 33 } |
| 34 ; CHECK-LABEL: fixed_416_align_32: |
| 35 ; CHECK: and esp, 4294967264 |
| 36 ; CHECK: sub esp, 416 |
| 37 ; CHECK: sub esp, 16 |
| 38 ; CHECK: mov dword ptr [esp], eax |
| 39 ; CHECK: call f1 |
| 40 |
| 41 define void @fixed_351_align_16(i32 %n) { |
| 42 entry: |
| 43 %array = alloca i8, i32 351, align 16 |
| 44 %__2 = ptrtoint i8* %array to i32 |
| 45 call void @f1(i32 %__2) |
| 46 ret void |
| 47 } |
| 48 ; CHECK-LABEL: fixed_351_align_16: |
| 49 ; CHECK: sub esp, 352 |
| 50 ; CHECK: sub esp, 16 |
| 51 ; CHECK: mov dword ptr [esp], eax |
| 52 ; CHECK: call f1 |
| 53 |
| 54 define void @fixed_351_align_32(i32 %n) { |
| 55 entry: |
| 56 %array = alloca i8, i32 351, align 32 |
| 57 %__2 = ptrtoint i8* %array to i32 |
| 58 call void @f1(i32 %__2) |
| 59 ret void |
| 60 } |
| 61 ; CHECK-LABEL: fixed_351_align_32: |
| 62 ; CHECK: and esp, 4294967264 |
| 63 ; CHECK: sub esp, 352 |
| 64 ; CHECK: sub esp, 16 |
| 65 ; CHECK: mov dword ptr [esp], eax |
| 66 ; CHECK: call f1 |
33 | 67 |
34 declare void @f1(i32) | 68 declare void @f1(i32) |
35 | 69 |
36 define void @variable_n(i32 %n) { | 70 define void @variable_n_align_16(i32 %n) { |
37 entry: | 71 entry: |
38 %array = alloca i8, i32 %n, align 16 | 72 %array = alloca i8, i32 %n, align 16 |
39 %__2 = ptrtoint i8* %array to i32 | 73 %__2 = ptrtoint i8* %array to i32 |
40 call void @f2(i32 %__2) | 74 call void @f2(i32 %__2) |
41 ret void | 75 ret void |
42 } | 76 } |
43 ; CHECK: variable_n: | 77 ; CHECK-LABEL: variable_n_align_16: |
44 ; CHECK: mov eax, dword ptr [ebp+8] | 78 ; CHECK: mov eax, dword ptr [ebp+8] |
45 ; CHECK-NEXT: sub esp, eax | 79 ; CHECK: add eax, 15 |
46 ; CHECK-NEXT: mov eax, esp | 80 ; CHECK: and eax, 4294967280 |
47 ; CHECK-NEXT: push eax | 81 ; CHECK: sub esp, eax |
48 ; CHECK-NEXT: call f2 | 82 ; CHECK: sub esp, 16 |
49 ; | 83 ; CHECK: mov dword ptr [esp], eax |
50 ; OPTM1: variable_n: | 84 ; CHECK: call f2 |
51 ; OPTM1: mov {{.*}}, esp | 85 |
52 ; OPTM1: push | 86 define void @variable_n_align_32(i32 %n) { |
53 ; OPTM1-NEXT: call f2 | 87 entry: |
| 88 %array = alloca i8, i32 %n, align 32 |
| 89 %__2 = ptrtoint i8* %array to i32 |
| 90 call void @f2(i32 %__2) |
| 91 ret void |
| 92 } |
| 93 ; In -O2, the order of the CHECK-DAG lines in the output is switched. |
| 94 ; CHECK-LABEL: variable_n_align_32: |
| 95 ; CHECK-DAG: and esp, 4294967264 |
| 96 ; CHECK-DAG: mov eax, dword ptr [ebp+8] |
| 97 ; CHECK: add eax, 15 |
| 98 ; CHECK: and eax, 4294967280 |
| 99 ; CHECK: sub esp, eax |
| 100 ; CHECK: and esp, 4294967264 |
| 101 ; CHECK: sub esp, 16 |
| 102 ; CHECK: mov dword ptr [esp], eax |
| 103 ; CHECK: call f2 |
54 | 104 |
55 declare void @f2(i32) | 105 declare void @f2(i32) |
56 | 106 |
57 ; ERRORS-NOT: ICE translation error | 107 ; ERRORS-NOT: ICE translation error |
58 ; DUMP-NOT: SZ | 108 ; DUMP-NOT: SZ |
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