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| 1 ; This test checks that undef values are represented as zero. | 1 ; This test checks that undef values are represented as zero. |
| 2 | 2 |
| 3 ; RUN: %llvm2ice --verbose none %s | FileCheck %s | 3 ; RUN: %llvm2ice --verbose none %s | FileCheck %s |
| 4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s | 4 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s |
| 5 ; RUN: %llvm2ice -mattr=sse4.1 --verbose none %s | FileCheck %s | 5 ; RUN: %llvm2ice -mattr=sse4.1 --verbose none %s | FileCheck %s |
| 6 ; RUN: %llvm2ice -mattr=sse4.1 -O2 --verbose none %s | FileCheck %s | 6 ; RUN: %llvm2ice -mattr=sse4.1 -O2 --verbose none %s | FileCheck %s |
| 7 ; RUN: %llvm2ice -O2 --verbose none %s \ | 7 ; RUN: %llvm2ice -O2 --verbose none %s \ |
| 8 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | 8 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj |
| 9 ; RUN: %llvm2ice -Om1 --verbose none %s \ | 9 ; RUN: %llvm2ice -Om1 --verbose none %s \ |
| 10 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj | 10 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj |
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| 30 ; CHECK-LABEL: undef_i64: | 30 ; CHECK-LABEL: undef_i64: |
| 31 ; CHECK-DAG: mov eax, 0 | 31 ; CHECK-DAG: mov eax, 0 |
| 32 ; CHECK-DAG: mov edx, 0 | 32 ; CHECK-DAG: mov edx, 0 |
| 33 ; CHECK: ret | 33 ; CHECK: ret |
| 34 } | 34 } |
| 35 | 35 |
| 36 define float @undef_float() { | 36 define float @undef_float() { |
| 37 entry: | 37 entry: |
| 38 ret float undef | 38 ret float undef |
| 39 ; CHECK-LABEL: undef_float: | 39 ; CHECK-LABEL: undef_float: |
| 40 ; CHECK-NOT: sub esp | 40 ; CHECK: [L$float$ |
| 41 ; CHECK: fld | |
| 42 } | 41 } |
| 43 | 42 |
| 44 define <4 x i1> @undef_v4i1() { | 43 define <4 x i1> @undef_v4i1() { |
| 45 entry: | 44 entry: |
| 46 ret <4 x i1> undef | 45 ret <4 x i1> undef |
| 47 ; CHECK-LABEL: undef_v4i1: | 46 ; CHECK-LABEL: undef_v4i1: |
| 48 ; CHECK: pxor | 47 ; CHECK: pxor |
| 49 } | 48 } |
| 50 | 49 |
| 51 define <8 x i1> @undef_v8i1() { | 50 define <8 x i1> @undef_v8i1() { |
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| 286 define <4 x float> @vector_select_v4f32_arg2(<4 x i1> %cond, <4 x float> %a) { | 285 define <4 x float> @vector_select_v4f32_arg2(<4 x i1> %cond, <4 x float> %a) { |
| 287 entry: | 286 entry: |
| 288 %val = select <4 x i1> %cond, <4 x float> %a, <4 x float> undef | 287 %val = select <4 x i1> %cond, <4 x float> %a, <4 x float> undef |
| 289 ret <4 x float> %val | 288 ret <4 x float> %val |
| 290 ; CHECK-LABEL: vector_select_v4f32_arg2: | 289 ; CHECK-LABEL: vector_select_v4f32_arg2: |
| 291 ; CHECK: pxor | 290 ; CHECK: pxor |
| 292 } | 291 } |
| 293 | 292 |
| 294 ; ERRORS-NOT: ICE translation error | 293 ; ERRORS-NOT: ICE translation error |
| 295 ; DUMP-NOT: SZ | 294 ; DUMP-NOT: SZ |
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