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Side by Side Diff: tests_lit/llvm2ice_tests/64bit.pnacl.ll

Issue 444443002: Subzero: Align the stack at the point of function calls. (Closed) Base URL: https://gerrit.chromium.org/gerrit/p/native_client/pnacl-subzero.git@master
Patch Set: Fix comments and style in the crosstest Created 6 years, 4 months ago
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1 ; This tries to be a comprehensive test of i64 operations, in 1 ; This tries to be a comprehensive test of i64 operations, in
2 ; particular the patterns for lowering i64 operations into constituent 2 ; particular the patterns for lowering i64 operations into constituent
3 ; i32 operations on x86-32. 3 ; i32 operations on x86-32.
4 4
5 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s 5 ; RUN: %llvm2ice -O2 --verbose none %s | FileCheck %s
6 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s 6 ; RUN: %llvm2ice -Om1 --verbose none %s | FileCheck --check-prefix=OPTM1 %s
7 ; RUN: %llvm2ice -O2 --verbose none %s \ 7 ; RUN: %llvm2ice -O2 --verbose none %s \
8 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj 8 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj
9 ; RUN: %llvm2ice -Om1 --verbose none %s \ 9 ; RUN: %llvm2ice -Om1 --verbose none %s \
10 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj 10 ; RUN: | llvm-mc -arch=x86 -x86-asm-syntax=intel -filetype=obj
(...skipping 15 matching lines...) Expand all
26 define internal i32 @pass64BitArg(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f ) { 26 define internal i32 @pass64BitArg(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f ) {
27 entry: 27 entry:
28 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 %b) 28 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 %b)
29 %call1 = call i32 @ignore64BitArgNoInline(i64 %c, i32 123, i64 %d) 29 %call1 = call i32 @ignore64BitArgNoInline(i64 %c, i32 123, i64 %d)
30 %call2 = call i32 @ignore64BitArgNoInline(i64 %e, i32 123, i64 %f) 30 %call2 = call i32 @ignore64BitArgNoInline(i64 %e, i32 123, i64 %f)
31 %add = add i32 %call1, %call 31 %add = add i32 %call1, %call
32 %add3 = add i32 %add, %call2 32 %add3 = add i32 %add, %call2
33 ret i32 %add3 33 ret i32 %add3
34 } 34 }
35 ; CHECK: pass64BitArg: 35 ; CHECK: pass64BitArg:
36 ; CHECK: push 123 36 ; CHECK: sub esp
37 ; CHECK-NEXT: push 37 ; CHECK: mov dword ptr [esp+4]
38 ; CHECK-NEXT: push 38 ; CHECK: mov dword ptr [esp]
39 ; CHECK-NEXT: call ignore64BitArgNoInline 39 ; CHECK: mov dword ptr [esp+8], 123
40 ; CHECK: push 40 ; CHECK: mov dword ptr [esp+16]
41 ; CHECK-NEXT: push 41 ; CHECK: mov dword ptr [esp+12]
42 ; CHECK-NEXT: push 123 42 ; CHECK: call ignore64BitArgNoInline
43 ; CHECK-NEXT: push 43 ; CHECK sub esp
44 ; CHECK-NEXT: push 44 ; CHECK: mov dword ptr [esp+4]
45 ; CHECK-NEXT: call ignore64BitArgNoInline 45 ; CHECK: mov dword ptr [esp]
46 ; CHECK: push 46 ; CHECK: mov dword ptr [esp+8], 123
47 ; CHECK-NEXT: push 47 ; CHECK: mov dword ptr [esp+16]
48 ; CHECK-NEXT: push 123 48 ; CHECK: mov dword ptr [esp+12]
49 ; CHECK-NEXT: push 49 ; CHECK: call ignore64BitArgNoInline
50 ; CHECK-NEXT: push 50 ; CHECK: sub esp
51 ; CHECK-NEXT: call ignore64BitArgNoInline 51 ; CHECK: mov dword ptr [esp+4]
52 ; CHECK: mov dword ptr [esp]
53 ; CHECK: mov dword ptr [esp+8], 123
54 ; CHECK: mov dword ptr [esp+16]
55 ; CHECK: mov dword ptr [esp+12]
56 ; CHECK: call ignore64BitArgNoInline
52 ; 57 ;
53 ; OPTM1: pass64BitArg: 58 ; OPTM1: pass64BitArg:
54 ; OPTM1: push 123 59 ; OPTM1: sub esp
55 ; OPTM1-NEXT: push 60 ; OPTM1: mov dword ptr [esp+4]
56 ; OPTM1-NEXT: push 61 ; OPTM1: mov dword ptr [esp]
57 ; OPTM1-NEXT: call ignore64BitArgNoInline 62 ; OPTM1: mov dword ptr [esp+8], 123
58 ; OPTM1: push 63 ; OPTM1: mov dword ptr [esp+16]
59 ; OPTM1-NEXT: push 64 ; OPTM1: mov dword ptr [esp+12]
60 ; OPTM1-NEXT: push 123 65 ; OPTM1: call ignore64BitArgNoInline
61 ; OPTM1-NEXT: push 66 ; OPTM1 sub esp
62 ; OPTM1-NEXT: push 67 ; OPTM1: mov dword ptr [esp+4]
63 ; OPTM1-NEXT: call ignore64BitArgNoInline 68 ; OPTM1: mov dword ptr [esp]
64 ; OPTM1: push 69 ; OPTM1: mov dword ptr [esp+8], 123
65 ; OPTM1-NEXT: push 70 ; OPTM1: mov dword ptr [esp+16]
66 ; OPTM1-NEXT: push 123 71 ; OPTM1: mov dword ptr [esp+12]
67 ; OPTM1-NEXT: push 72 ; OPTM1: call ignore64BitArgNoInline
68 ; OPTM1-NEXT: push 73 ; OPTM1: sub esp
69 ; OPTM1-NEXT: call ignore64BitArgNoInline 74 ; OPTM1: mov dword ptr [esp+4]
75 ; OPTM1: mov dword ptr [esp]
76 ; OPTM1: mov dword ptr [esp+8], 123
77 ; OPTM1: mov dword ptr [esp+16]
78 ; OPTM1: mov dword ptr [esp+12]
79 ; OPTM1: call ignore64BitArgNoInline
70 80
71 declare i32 @ignore64BitArgNoInline(i64, i32, i64) 81 declare i32 @ignore64BitArgNoInline(i64, i32, i64)
72 82
73 define internal i32 @pass64BitConstArg(i64 %a, i64 %b) { 83 define internal i32 @pass64BitConstArg(i64 %a, i64 %b) {
74 entry: 84 entry:
75 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 -240105309230672 5256) 85 %call = call i32 @ignore64BitArgNoInline(i64 %a, i32 123, i64 -240105309230672 5256)
76 ret i32 %call 86 ret i32 %call
77 } 87 }
78 ; CHECK: pass64BitConstArg: 88 ; CHECK: pass64BitConstArg:
79 ; CHECK: push 3735928559 89 ; CHECK: sub esp
80 ; CHECK-NEXT: push 305419896 90 ; CHECK: mov dword ptr [esp+4]
81 ; CHECK-NEXT: push 123 91 ; CHECK-NEXT: mov dword ptr [esp]
82 ; CHECK-NEXT: push ecx 92 ; CHECK-NEXT: mov dword ptr [esp+8], 123
83 ; CHECK-NEXT: push eax 93 ; CHECK-NEXT: mov dword ptr [esp+16], 3735928559
94 ; CHECK-NEXT: mov dword ptr [esp+12], 305419896
84 ; CHECK-NEXT: call ignore64BitArgNoInline 95 ; CHECK-NEXT: call ignore64BitArgNoInline
85 ; 96 ;
86 ; OPTM1: pass64BitConstArg: 97 ; OPTM1: pass64BitConstArg:
87 ; OPTM1: push 3735928559 98 ; OPTM1: sub esp
88 ; OPTM1-NEXT: push 305419896 99 ; OPTM1: mov dword ptr [esp+4]
89 ; OPTM1-NEXT: push 123 100 ; OPTM1-NEXT: mov dword ptr [esp]
90 ; OPTM1-NEXT: push dword ptr [ 101 ; OPTM1-NEXT: mov dword ptr [esp+8], 123
91 ; OPTM1-NEXT: push dword ptr [ 102 ; OPTM1-NEXT: mov dword ptr [esp+16], 3735928559
103 ; OPTM1-NEXT: mov dword ptr [esp+12], 305419896
92 ; OPTM1-NEXT: call ignore64BitArgNoInline 104 ; OPTM1-NEXT: call ignore64BitArgNoInline
93 105
94 define internal i64 @return64BitArg(i64 %a) { 106 define internal i64 @return64BitArg(i64 %a) {
95 entry: 107 entry:
96 ret i64 %a 108 ret i64 %a
97 } 109 }
98 ; CHECK: return64BitArg: 110 ; CHECK: return64BitArg:
99 ; CHECK: mov {{.*}}, dword ptr [esp+4] 111 ; CHECK: mov {{.*}}, dword ptr [esp+4]
100 ; CHECK: mov {{.*}}, dword ptr [esp+8] 112 ; CHECK: mov {{.*}}, dword ptr [esp+8]
101 ; CHECK: ret 113 ; CHECK: ret
(...skipping 131 matching lines...) Expand 10 before | Expand all | Expand 10 after
233 ; OPTM1: div64BitSigned: 245 ; OPTM1: div64BitSigned:
234 ; OPTM1: call __divdi3 246 ; OPTM1: call __divdi3
235 ; OPTM1: ret 247 ; OPTM1: ret
236 248
237 define internal i64 @div64BitSignedConst(i64 %a) { 249 define internal i64 @div64BitSignedConst(i64 %a) {
238 entry: 250 entry:
239 %div = sdiv i64 %a, 12345678901234 251 %div = sdiv i64 %a, 12345678901234
240 ret i64 %div 252 ret i64 %div
241 } 253 }
242 ; CHECK-LABEL: div64BitSignedConst: 254 ; CHECK-LABEL: div64BitSignedConst:
243 ; CHECK: push 2874 255 ; CHECK: mov dword ptr [esp+12], 2874
244 ; CHECK: push 1942892530 256 ; CHECK: mov dword ptr [esp+8], 1942892530
245 ; CHECK: call __divdi3 257 ; CHECK: call __divdi3
246 ; CHECK: ret 258 ; CHECK: ret
247 ; 259 ;
248 ; OPTM1-LABEL: div64BitSignedConst: 260 ; OPTM1-LABEL: div64BitSignedConst:
249 ; OPTM1: push 2874 261 ; OPTM1: mov dword ptr [esp+12], 2874
250 ; OPTM1: push 1942892530 262 ; OPTM1: mov dword ptr [esp+8], 1942892530
251 ; OPTM1: call __divdi3 263 ; OPTM1: call __divdi3
252 ; OPTM1: ret 264 ; OPTM1: ret
253 265
254 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) { 266 define internal i64 @div64BitUnsigned(i64 %a, i64 %b) {
255 entry: 267 entry:
256 %div = udiv i64 %a, %b 268 %div = udiv i64 %a, %b
257 ret i64 %div 269 ret i64 %div
258 } 270 }
259 ; CHECK: div64BitUnsigned: 271 ; CHECK: div64BitUnsigned:
260 ; CHECK: call __udivdi3 272 ; CHECK: call __udivdi3
(...skipping 939 matching lines...) Expand 10 before | Expand all | Expand 10 after
1200 ; OPTM1: cmp 1212 ; OPTM1: cmp
1201 ; OPTM1: jb 1213 ; OPTM1: jb
1202 ; OPTM1: ja 1214 ; OPTM1: ja
1203 ; OPTM1: cmp 1215 ; OPTM1: cmp
1204 ; OPTM1: jb 1216 ; OPTM1: jb
1205 ; OPTM1: cmp 1217 ; OPTM1: cmp
1206 ; OPTM1: jne 1218 ; OPTM1: jne
1207 1219
1208 ; ERRORS-NOT: ICE translation error 1220 ; ERRORS-NOT: ICE translation error
1209 ; DUMP-NOT: SZ 1221 ; DUMP-NOT: SZ
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