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Issue 44153002: Introduce andps for IA32/X64 (Closed) Base URL: git://github.com/v8/v8.git@master
Patch Set: Created 7 years, 1 month ago
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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions 5 // modification, are permitted provided that the following conditions
6 // are met: 6 // are met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
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2337 EnsureSpace ensure_space(this); 2337 EnsureSpace ensure_space(this);
2338 EMIT(0x66); 2338 EMIT(0x66);
2339 EMIT(0x0F); 2339 EMIT(0x0F);
2340 EMIT(0x3A); 2340 EMIT(0x3A);
2341 EMIT(0x17); 2341 EMIT(0x17);
2342 emit_sse_operand(src, dst); 2342 emit_sse_operand(src, dst);
2343 EMIT(imm8); 2343 EMIT(imm8);
2344 } 2344 }
2345 2345
2346 2346
2347 void Assembler::andps(XMMRegister dst, XMMRegister src) {
2348 EnsureSpace ensure_space(this);
2349 EMIT(0x0F);
2350 EMIT(0x54);
2351 emit_sse_operand(dst, src);
2352 }
2353
2354
2347 void Assembler::pand(XMMRegister dst, XMMRegister src) { 2355 void Assembler::pand(XMMRegister dst, XMMRegister src) {
2348 ASSERT(IsEnabled(SSE2)); 2356 ASSERT(IsEnabled(SSE2));
2349 EnsureSpace ensure_space(this); 2357 EnsureSpace ensure_space(this);
2350 EMIT(0x66); 2358 EMIT(0x66);
2351 EMIT(0x0F); 2359 EMIT(0x0F);
2352 EMIT(0xDB); 2360 EMIT(0xDB);
2353 emit_sse_operand(dst, src); 2361 emit_sse_operand(dst, src);
2354 } 2362 }
2355 2363
2356 2364
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2681 fprintf(coverage_log, "%s\n", file_line); 2689 fprintf(coverage_log, "%s\n", file_line);
2682 fflush(coverage_log); 2690 fflush(coverage_log);
2683 } 2691 }
2684 } 2692 }
2685 2693
2686 #endif 2694 #endif
2687 2695
2688 } } // namespace v8::internal 2696 } } // namespace v8::internal
2689 2697
2690 #endif // V8_TARGET_ARCH_IA32 2698 #endif // V8_TARGET_ARCH_IA32
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