Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(366)

Side by Side Diff: src/arm64/assembler-arm64.cc

Issue 437813004: ARM64: Use ARRAY_SIZE where possible. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch | Annotate | Revision Log
« no previous file with comments | « no previous file | src/arm64/instrument-arm64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // 2 //
3 // Redistribution and use in source and binary forms, with or without 3 // Redistribution and use in source and binary forms, with or without
4 // modification, are permitted provided that the following conditions are 4 // modification, are permitted provided that the following conditions are
5 // met: 5 // met:
6 // 6 //
7 // * Redistributions of source code must retain the above copyright 7 // * Redistributions of source code must retain the above copyright
8 // notice, this list of conditions and the following disclaimer. 8 // notice, this list of conditions and the following disclaimer.
9 // * Redistributions in binary form must reproduce the above 9 // * Redistributions in binary form must reproduce the above
10 // copyright notice, this list of conditions and the following 10 // copyright notice, this list of conditions and the following
(...skipping 209 matching lines...) Expand 10 before | Expand all | Expand 10 after
220 const CPURegister& reg5, const CPURegister& reg6, 220 const CPURegister& reg5, const CPURegister& reg6,
221 const CPURegister& reg7, const CPURegister& reg8) { 221 const CPURegister& reg7, const CPURegister& reg8) {
222 int number_of_valid_regs = 0; 222 int number_of_valid_regs = 0;
223 int number_of_valid_fpregs = 0; 223 int number_of_valid_fpregs = 0;
224 224
225 RegList unique_regs = 0; 225 RegList unique_regs = 0;
226 RegList unique_fpregs = 0; 226 RegList unique_fpregs = 0;
227 227
228 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8}; 228 const CPURegister regs[] = {reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8};
229 229
230 for (unsigned i = 0; i < sizeof(regs) / sizeof(regs[0]); i++) { 230 for (unsigned i = 0; i < ARRAY_SIZE(regs); i++) {
231 if (regs[i].IsRegister()) { 231 if (regs[i].IsRegister()) {
232 number_of_valid_regs++; 232 number_of_valid_regs++;
233 unique_regs |= regs[i].Bit(); 233 unique_regs |= regs[i].Bit();
234 } else if (regs[i].IsFPRegister()) { 234 } else if (regs[i].IsFPRegister()) {
235 number_of_valid_fpregs++; 235 number_of_valid_fpregs++;
236 unique_fpregs |= regs[i].Bit(); 236 unique_fpregs |= regs[i].Bit();
237 } else { 237 } else {
238 ASSERT(!regs[i].IsValid()); 238 ASSERT(!regs[i].IsValid());
239 } 239 }
240 } 240 }
(...skipping 2410 matching lines...) Expand 10 before | Expand all | Expand 10 after
2651 0x0000000000000001UL, 2651 0x0000000000000001UL,
2652 0x0000000100000001UL, 2652 0x0000000100000001UL,
2653 0x0001000100010001UL, 2653 0x0001000100010001UL,
2654 0x0101010101010101UL, 2654 0x0101010101010101UL,
2655 0x1111111111111111UL, 2655 0x1111111111111111UL,
2656 0x5555555555555555UL, 2656 0x5555555555555555UL,
2657 }; 2657 };
2658 int multiplier_idx = CountLeadingZeros(d, kXRegSizeInBits) - 57; 2658 int multiplier_idx = CountLeadingZeros(d, kXRegSizeInBits) - 57;
2659 // Ensure that the index to the multipliers array is within bounds. 2659 // Ensure that the index to the multipliers array is within bounds.
2660 ASSERT((multiplier_idx >= 0) && 2660 ASSERT((multiplier_idx >= 0) &&
2661 (static_cast<size_t>(multiplier_idx) < 2661 (static_cast<size_t>(multiplier_idx) < ARRAY_SIZE(multipliers)));
2662 (sizeof(multipliers) / sizeof(multipliers[0]))));
2663 uint64_t multiplier = multipliers[multiplier_idx]; 2662 uint64_t multiplier = multipliers[multiplier_idx];
2664 uint64_t candidate = (b - a) * multiplier; 2663 uint64_t candidate = (b - a) * multiplier;
2665 2664
2666 if (value != candidate) { 2665 if (value != candidate) {
2667 // The candidate pattern doesn't match our input value, so fail. 2666 // The candidate pattern doesn't match our input value, so fail.
2668 return false; 2667 return false;
2669 } 2668 }
2670 2669
2671 // We have a match! This is a valid logical immediate, so now we have to 2670 // We have a match! This is a valid logical immediate, so now we have to
2672 // construct the bits and pieces of the instruction encoding that generates 2671 // construct the bits and pieces of the instruction encoding that generates
(...skipping 444 matching lines...) Expand 10 before | Expand all | Expand 10 after
3117 movz(scratch, (target_offset >> 16) & 0xFFFF, 16); 3116 movz(scratch, (target_offset >> 16) & 0xFFFF, 16);
3118 movk(scratch, (target_offset >> 32) & 0xFFFF, 32); 3117 movk(scratch, (target_offset >> 32) & 0xFFFF, 32);
3119 ASSERT((target_offset >> 48) == 0); 3118 ASSERT((target_offset >> 48) == 0);
3120 add(rd, rd, scratch); 3119 add(rd, rd, scratch);
3121 } 3120 }
3122 3121
3123 3122
3124 } } // namespace v8::internal 3123 } } // namespace v8::internal
3125 3124
3126 #endif // V8_TARGET_ARCH_ARM64 3125 #endif // V8_TARGET_ARCH_ARM64
OLDNEW
« no previous file with comments | « no previous file | src/arm64/instrument-arm64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698