Faster IC stubs by specializing them for Binary Smi operations

runtime/vm/stub_code_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/code_generator.h"
 #include "vm/compiler.h"
@@ skipping 1296 matching lines @@
   ASSERT(temp_reg == R6);
   __ LoadFieldFromOffset(func_reg, ic_reg, ICData::owner_offset(), kNoPP);
   __ LoadFieldFromOffset(
       R7, func_reg, Function::usage_counter_offset(), kNoPP, kWord);
   __ AddImmediate(R7, R7, 1, kNoPP);
   __ StoreFieldToOffset(
       R7, func_reg, Function::usage_counter_offset(), kNoPP, kWord);
 }
 
 
+// Note: xxx must be preserved if 'not_smi_or_overflow' is jumped to.

[Cutch, 2014/08/15 21:23:28]

xxx?

[zra, 2014/08/15 21:45:08]

Should be R5 as on ARM.

[srdjan, 2014/08/15 21:49:00]

R6.

[zra, 2014/08/15 22:12:33]

Ah, right, sorry.

[srdjan, 2014/08/18 20:40:27]

You are right: R5 :-).

+// Attempt a quick Smi operation for known operations ('kind'). The ICData
+// must have been primed with a Smi/Smi check that will be used for counting
+// the invocations.
+static void EmitFastSmiOp(Assembler* assembler,
+                          Token::Kind kind,
+                          intptr_t num_args,
+                          Label* not_smi_or_overflow) {
+  if (FLAG_throw_on_javascript_int_overflow) {
+    // The overflow check is more complex than implemented below.
+    return;
+  }
+  __ ldr(R0, Address(SP, + 0 * kWordSize));  // Right.
+  __ ldr(R1, Address(SP, + 1 * kWordSize));  // Left.
+  __ orr(TMP, R0, Operand(R1));
+  __ tsti(TMP, kSmiTagMask);
+  __ b(not_smi_or_overflow, NE);
+  switch (kind) {
+    case Token::kADD: {
+      __ adds(R0, R1, Operand(R0));  // Adds.
+      __ b(not_smi_or_overflow, VS);  // Branch if overflow.
+      break;
+    }
+    case Token::kSUB: {
+      __ subs(R0, R1, Operand(R0));  // Subtract.
+      __ b(not_smi_or_overflow, VS);  // Branch if overflow.
+      break;
+    }
+    case Token::kEQ: {
+      Label done, is_true;

[zra, 2014/08/15 21:45:08]

Using conditional select:

__ CompareRegisters(R0, R1);
__ LoadObject(R0, Bool::True(), PP);
__ LoadObject(R1, Bool::False(), PP);
__ csel(R0, R1, R0, NE);

[srdjan, 2014/08/18 20:40:27]

Done.

+      __ cmp(R0, Operand(R1));
+      __ b(&is_true, EQ);
+      __ LoadObject(R0, Bool::False(), PP);
+      __ b(&done);
+      __ Bind(&is_true);
+      __ LoadObject(R0, Bool::True(), PP);
+      __ Bind(&done);
+      break;
+    }
+    default: UNIMPLEMENTED();
+  }
+
+  // R5: IC data object (preserved).
+  __ LoadFieldFromOffset(R6, R5, ICData::ic_data_offset(), kNoPP);
+  // R6: ic_data_array with check entries: classes and target functions.
+  __ AddImmediate(R6, R6, Array::data_offset() - kHeapObjectTag, kNoPP);
+  // R6: points directly to the first ic data array element.
+#ifdef DEBUG
+  // Check that first entry is for Smi/Smi.
+  Label error, ok;
+  const intptr_t imm_smi_cid = reinterpret_cast<intptr_t>(Smi::New(kSmiCid));
+  __ ldr(R1, Address(R6, 0));
+  __ CompareImmediate(R1, imm_smi_cid, kNoPP);
+  __ b(&error, NE);
+  __ ldr(R1, Address(R6, kWordSize));
+  __ CompareImmediate(R1, imm_smi_cid, kNoPP);
+  __ b(&ok, EQ);
+  __ Bind(&error);

[zra, 2014/08/15 21:45:08]

Same comment as on ARM.

[srdjan, 2014/08/18 20:40:27]

Ditto.

+  __ Stop("Incorrect IC data");
+  __ Bind(&ok);
+#endif
+  const intptr_t count_offset = ICData::CountIndexFor(num_args) * kWordSize;
+  // Update counter.
+  __ LoadFromOffset(R1, R6, count_offset, kNoPP);
+  __ adds(R1, R1, Operand(Smi::RawValue(1)));
+  __ LoadImmediate(R2, Smi::RawValue(Smi::kMaxValue), kNoPP);
+  __ csel(R1, R2, R1, VS);  // Overflow.
+  __ StoreToOffset(R1, R6, count_offset, kNoPP);
+
+  __ ret();
+}
+
+
 // Generate inline cache check for 'num_args'.
 //  LR: return address.
 //  R5: inline cache data object.
 // Control flow:
 // - If receiver is null -> jump to IC miss.
 // - If receiver is Smi -> load Smi class.
 // - If receiver is not-Smi -> load receiver's class.
 // - Check if 'num_args' (including receiver) match any IC data group.
 // - Match found -> jump to target.
 // - Match not found -> jump to IC miss.
 void StubCode::GenerateNArgsCheckInlineCacheStub(
     Assembler* assembler,
     intptr_t num_args,
-    const RuntimeEntry& handle_ic_miss) {
+    const RuntimeEntry& handle_ic_miss,
+    Token::Kind kind) {
   ASSERT(num_args > 0);
 #if defined(DEBUG)
   { Label ok;
     // Check that the IC data array has NumArgsTested() == num_args.
     // 'NumArgsTested' is stored in the least significant bits of 'state_bits'.
     __ LoadFromOffset(R6, R5, ICData::state_bits_offset() - kHeapObjectTag,
                       kNoPP, kUnsignedWord);
     ASSERT(ICData::NumArgsTestedShift() == 0);  // No shift needed.
     __ andi(R6, R6, ICData::NumArgsTestedMask());
     __ CompareImmediate(R6, num_args, kNoPP);
     __ b(&ok, EQ);
     __ Stop("Incorrect stub for IC data");
     __ Bind(&ok);
   }
 #endif  // DEBUG
 
   Label stepping, done_stepping;
   // Check single stepping.
   __ LoadFieldFromOffset(R6, CTX, Context::isolate_offset(), kNoPP);
   __ LoadFromOffset(
       R6, R6, Isolate::single_step_offset(), kNoPP, kUnsignedByte);
   __ CompareRegisters(R6, ZR);
   __ b(&stepping, NE);
   __ Bind(&done_stepping);
 
+  if (kind != Token::kILLEGAL) {
+    Label not_smi_or_overflow;
+    EmitFastSmiOp(assembler, kind, num_args, &not_smi_or_overflow);
+    __ Bind(&not_smi_or_overflow);
+  }
+
   // Load arguments descriptor into R4.
   __ LoadFieldFromOffset(R4, R5, ICData::arguments_descriptor_offset(), kNoPP);
   // Loop that checks if there is an IC data match.
   Label loop, update, test, found;
   // R5: IC data object (preserved).
   __ LoadFieldFromOffset(R6, R5, ICData::ic_data_offset(), kNoPP);
   // R6: ic_data_array with check entries: classes and target functions.
   __ AddImmediate(R6, R6, Array::data_offset() - kHeapObjectTag, kNoPP);
   // R6: points directly to the first ic data array element.
 
@@ skipping 116 matching lines @@
 //  LR: return address.
 //  R5: inline cache data object.
 // Inline cache data object structure:
 // 0: function-name
 // 1: N, number of arguments checked.
 // 2 .. (length - 1): group of checks, each check containing:
 //   - N classes.
 //   - 1 target function.
 void StubCode::GenerateOneArgCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, R6);
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 1,
+      kInlineCacheMissHandlerOneArgRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateTwoArgsCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, R6);
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 2, kInlineCacheMissHandlerTwoArgsRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 2,
+      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateThreeArgsCheckInlineCacheStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, R6);
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 3, kInlineCacheMissHandlerThreeArgsRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 3,
+      kInlineCacheMissHandlerThreeArgsRuntimeEntry, Token::kILLEGAL);
+}
+
+
+void StubCode::GenerateSmiAddInlineCacheStub(Assembler* assembler) {
+  GenerateUsageCounterIncrement(assembler, R6);
+  GenerateNArgsCheckInlineCacheStub(assembler, 2,
+      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kADD);
+}
+
+
+void StubCode::GenerateSmiSubInlineCacheStub(Assembler* assembler) {
+  GenerateUsageCounterIncrement(assembler, R6);
+  GenerateNArgsCheckInlineCacheStub(assembler, 2,
+      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kSUB);
+}
+
+
+void StubCode::GenerateSmiEqualInlineCacheStub(Assembler* assembler) {
+  GenerateUsageCounterIncrement(assembler, R6);
+  GenerateNArgsCheckInlineCacheStub(assembler, 2,
+      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kEQ);
 }
 
 
 void StubCode::GenerateOneArgOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 1,
+      kInlineCacheMissHandlerOneArgRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateTwoArgsOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 2, kInlineCacheMissHandlerTwoArgsRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 2,
+      kInlineCacheMissHandlerTwoArgsRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateThreeArgsOptimizedCheckInlineCacheStub(
     Assembler* assembler) {
   GenerateOptimizedUsageCounterIncrement(assembler);
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 3, kInlineCacheMissHandlerThreeArgsRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 3,
+      kInlineCacheMissHandlerThreeArgsRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateClosureCallInlineCacheStub(Assembler* assembler) {
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 1, kInlineCacheMissHandlerOneArgRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 1,
+      kInlineCacheMissHandlerOneArgRuntimeEntry, Token::kILLEGAL);
 }
 
 
 void StubCode::GenerateZeroArgsUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, R6);
 #if defined(DEBUG)
   { Label ok;
     // Check that the IC data array has NumArgsTested() == 0.
     // 'NumArgsTested' is stored in the least significant bits of 'state_bits'.
     __ LoadFromOffset(R6, R5, ICData::state_bits_offset() - kHeapObjectTag,
@@ skipping 49 matching lines @@
   // R0: function.
   // R2: target instructons.
   __ AddImmediate(
       R2, R2, Instructions::HeaderSize() - kHeapObjectTag, kNoPP);
   __ br(R2);
 }
 
 
 void StubCode::GenerateTwoArgsUnoptimizedStaticCallStub(Assembler* assembler) {
   GenerateUsageCounterIncrement(assembler, R6);
-  GenerateNArgsCheckInlineCacheStub(
-      assembler, 2, kStaticCallMissHandlerTwoArgsRuntimeEntry);
+  GenerateNArgsCheckInlineCacheStub(assembler, 2,
+      kStaticCallMissHandlerTwoArgsRuntimeEntry, Token::kILLEGAL);
 }
 
 
 // Stub for compiling a function and jumping to the compiled code.
 // R5: IC-Data (for methods).
 // R4: Arguments descriptor.
 // R0: Function.
 void StubCode::GenerateLazyCompileStub(Assembler* assembler) {
   // Preserve arg desc. and IC data object.
   __ EnterStubFrame();
@@ skipping 337 matching lines @@
   const Register right = R0;
   __ LoadFromOffset(left, SP, 1 * kWordSize, kNoPP);
   __ LoadFromOffset(right, SP, 0 * kWordSize, kNoPP);
   GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp);
   __ ret();
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64