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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_INSTRUCTION_CODES_H_ | 5 #ifndef V8_COMPILER_INSTRUCTION_CODES_H_ |
6 #define V8_COMPILER_INSTRUCTION_CODES_H_ | 6 #define V8_COMPILER_INSTRUCTION_CODES_H_ |
7 | 7 |
8 #if V8_TARGET_ARCH_ARM | 8 #if V8_TARGET_ARCH_ARM |
9 #include "src/compiler/arm/instruction-codes-arm.h" | 9 #include "src/compiler/arm/instruction-codes-arm.h" |
10 #elif V8_TARGET_ARCH_ARM64 | 10 #elif V8_TARGET_ARCH_ARM64 |
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80 kSignedGreaterThan, | 80 kSignedGreaterThan, |
81 kUnsignedLessThan, | 81 kUnsignedLessThan, |
82 kUnsignedGreaterThanOrEqual, | 82 kUnsignedGreaterThanOrEqual, |
83 kUnsignedLessThanOrEqual, | 83 kUnsignedLessThanOrEqual, |
84 kUnsignedGreaterThan, | 84 kUnsignedGreaterThan, |
85 kUnorderedEqual, | 85 kUnorderedEqual, |
86 kUnorderedNotEqual, | 86 kUnorderedNotEqual, |
87 kUnorderedLessThan, | 87 kUnorderedLessThan, |
88 kUnorderedGreaterThanOrEqual, | 88 kUnorderedGreaterThanOrEqual, |
89 kUnorderedLessThanOrEqual, | 89 kUnorderedLessThanOrEqual, |
90 kUnorderedGreaterThan | 90 kUnorderedGreaterThan, |
| 91 kOverflow, |
| 92 kNotOverflow |
91 }; | 93 }; |
92 | 94 |
93 OStream& operator<<(OStream& os, const FlagsCondition& fc); | 95 OStream& operator<<(OStream& os, const FlagsCondition& fc); |
94 | 96 |
95 // The InstructionCode is an opaque, target-specific integer that encodes | 97 // The InstructionCode is an opaque, target-specific integer that encodes |
96 // what code to emit for an instruction in the code generator. It is not | 98 // what code to emit for an instruction in the code generator. It is not |
97 // interesting to the register allocator, as the inputs and flags on the | 99 // interesting to the register allocator, as the inputs and flags on the |
98 // instructions specify everything of interest. | 100 // instructions specify everything of interest. |
99 typedef int32_t InstructionCode; | 101 typedef int32_t InstructionCode; |
100 | 102 |
101 // Helpers for encoding / decoding InstructionCode into the fields needed | 103 // Helpers for encoding / decoding InstructionCode into the fields needed |
102 // for code generation. We encode the instruction, addressing mode, and flags | 104 // for code generation. We encode the instruction, addressing mode, and flags |
103 // continuation into a single InstructionCode which is stored as part of | 105 // continuation into a single InstructionCode which is stored as part of |
104 // the instruction. | 106 // the instruction. |
105 typedef BitField<ArchOpcode, 0, 7> ArchOpcodeField; | 107 typedef BitField<ArchOpcode, 0, 7> ArchOpcodeField; |
106 typedef BitField<AddressingMode, 7, 4> AddressingModeField; | 108 typedef BitField<AddressingMode, 7, 4> AddressingModeField; |
107 typedef BitField<FlagsMode, 11, 2> FlagsModeField; | 109 typedef BitField<FlagsMode, 11, 2> FlagsModeField; |
108 typedef BitField<FlagsCondition, 13, 4> FlagsConditionField; | 110 typedef BitField<FlagsCondition, 13, 5> FlagsConditionField; |
109 typedef BitField<int, 13, 19> MiscField; | 111 typedef BitField<int, 13, 19> MiscField; |
110 | 112 |
111 } // namespace compiler | 113 } // namespace compiler |
112 } // namespace internal | 114 } // namespace internal |
113 } // namespace v8 | 115 } // namespace v8 |
114 | 116 |
115 #endif // V8_COMPILER_INSTRUCTION_CODES_H_ | 117 #endif // V8_COMPILER_INSTRUCTION_CODES_H_ |
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