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Side by Side Diff: src/compiler/ia32/instruction-selector-ia32.cc

Issue 436593002: [turbofan] Add Int32AddWithOverflow machine operator. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Add more tests. Created 6 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 #include "src/compiler/node-properties-inl.h" 7 #include "src/compiler/node-properties-inl.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 142 matching lines...) Expand 10 before | Expand all | Expand 10 after
153 g.UseRegister(base), g.UseImmediate(index), val); 153 g.UseRegister(base), g.UseImmediate(index), val);
154 } else { // store [%base + %index], %|#value 154 } else { // store [%base + %index], %|#value
155 Emit(opcode | AddressingModeField::encode(kMode_MR1I), NULL, 155 Emit(opcode | AddressingModeField::encode(kMode_MR1I), NULL,
156 g.UseRegister(base), g.UseRegister(index), val); 156 g.UseRegister(base), g.UseRegister(index), val);
157 } 157 }
158 // TODO(turbofan): addressing modes [r+r*{2,4,8}+K] 158 // TODO(turbofan): addressing modes [r+r*{2,4,8}+K]
159 } 159 }
160 160
161 161
162 // Shared routine for multiple binary operations. 162 // Shared routine for multiple binary operations.
163 static inline void VisitBinop(InstructionSelector* selector, Node* node, 163 static void VisitBinop(InstructionSelector* selector, Node* node,
164 ArchOpcode opcode) { 164 ArchOpcode opcode) {
165 IA32OperandGenerator g(selector); 165 IA32OperandGenerator g(selector);
166 Node* left = node->InputAt(0); 166 Int32BinopMatcher m(node);
167 Node* right = node->InputAt(1);
168 // TODO(turbofan): match complex addressing modes. 167 // TODO(turbofan): match complex addressing modes.
169 // TODO(turbofan): if commutative, pick the non-live-in operand as the left as 168 // TODO(turbofan): if commutative, pick the non-live-in operand as the left as
170 // this might be the last use and therefore its register can be reused. 169 // this might be the last use and therefore its register can be reused.
171 if (g.CanBeImmediate(right)) { 170 if (g.CanBeImmediate(m.right().node())) {
172 selector->Emit(opcode, g.DefineSameAsFirst(node), g.Use(left), 171 selector->Emit(opcode, g.DefineSameAsFirst(node), g.Use(m.left().node()),
173 g.UseImmediate(right)); 172 g.UseImmediate(m.right().node()));
174 } else if (g.CanBeImmediate(left) &&
175 node->op()->HasProperty(Operator::kCommutative)) {
176 selector->Emit(opcode, g.DefineSameAsFirst(node), g.Use(right),
177 g.UseImmediate(left));
178 } else { 173 } else {
179 selector->Emit(opcode, g.DefineSameAsFirst(node), g.UseRegister(left), 174 selector->Emit(opcode, g.DefineSameAsFirst(node),
180 g.Use(right)); 175 g.UseRegister(m.left().node()), g.Use(m.right().node()));
181 } 176 }
182 } 177 }
183 178
184 179
180 static void VisitBinopWithOverflow(InstructionSelector* selector, Node* node,
181 InstructionCode opcode) {
182 IA32OperandGenerator g(selector);
183 Int32BinopMatcher m(node);
184 InstructionOperand* inputs[2];
185 size_t input_count = 0;
186 InstructionOperand* outputs[2];
187 size_t output_count = 0;
188
189 // TODO(turbofan): match complex addressing modes.
190 // TODO(turbofan): if commutative, pick the non-live-in operand as the left as
191 // this might be the last use and therefore its register can be reused.
192 if (g.CanBeImmediate(m.right().node())) {
193 inputs[input_count++] = g.Use(m.left().node());
194 inputs[input_count++] = g.UseImmediate(m.right().node());
195 } else {
196 inputs[input_count++] = g.UseRegister(m.left().node());
197 inputs[input_count++] = g.Use(m.right().node());
198 }
199
200 // Define outputs depending on the projections.
201 Node* projections[2];
202 node->CollectProjections(ARRAY_SIZE(projections), projections);
203 if (projections[0]) {
204 outputs[output_count++] = g.DefineSameAsFirst(projections[0]);
205 }
206 if (projections[1]) {
207 opcode |= FlagsModeField::encode(kFlags_set);
208 opcode |= FlagsConditionField::encode(kOverflow);
209 // TODO(turbofan): Use byte register here.
210 outputs[output_count++] =
211 (projections[0] ? g.DefineAsRegister(projections[1])
212 : g.DefineSameAsFirst(projections[1]));
213 }
214
215 ASSERT_NE(0, input_count);
216 ASSERT_NE(0, output_count);
217 ASSERT_GE(ARRAY_SIZE(inputs), input_count);
218 ASSERT_GE(ARRAY_SIZE(outputs), output_count);
219
220 selector->Emit(opcode, output_count, outputs, input_count, inputs);
221 }
222
223
185 void InstructionSelector::VisitWord32And(Node* node) { 224 void InstructionSelector::VisitWord32And(Node* node) {
186 VisitBinop(this, node, kIA32And); 225 VisitBinop(this, node, kIA32And);
187 } 226 }
188 227
189 228
190 void InstructionSelector::VisitWord32Or(Node* node) { 229 void InstructionSelector::VisitWord32Or(Node* node) {
191 VisitBinop(this, node, kIA32Or); 230 VisitBinop(this, node, kIA32Or);
192 } 231 }
193 232
194 233
(...skipping 46 matching lines...) Expand 10 before | Expand all | Expand 10 after
241 void InstructionSelector::VisitWord32Sar(Node* node) { 280 void InstructionSelector::VisitWord32Sar(Node* node) {
242 VisitShift(this, node, kIA32Sar); 281 VisitShift(this, node, kIA32Sar);
243 } 282 }
244 283
245 284
246 void InstructionSelector::VisitInt32Add(Node* node) { 285 void InstructionSelector::VisitInt32Add(Node* node) {
247 VisitBinop(this, node, kIA32Add); 286 VisitBinop(this, node, kIA32Add);
248 } 287 }
249 288
250 289
290 void InstructionSelector::VisitInt32AddWithOverflow(Node* node) {
291 VisitBinopWithOverflow(this, node, kIA32Add);
292 }
293
294
251 void InstructionSelector::VisitInt32Sub(Node* node) { 295 void InstructionSelector::VisitInt32Sub(Node* node) {
252 IA32OperandGenerator g(this); 296 IA32OperandGenerator g(this);
253 Int32BinopMatcher m(node); 297 Int32BinopMatcher m(node);
254 if (m.left().Is(0)) { 298 if (m.left().Is(0)) {
255 Emit(kIA32Neg, g.DefineSameAsFirst(node), g.Use(m.right().node())); 299 Emit(kIA32Neg, g.DefineSameAsFirst(node), g.Use(m.right().node()));
256 } else { 300 } else {
257 VisitBinop(this, node, kIA32Sub); 301 VisitBinop(this, node, kIA32Sub);
258 } 302 }
259 } 303 }
260 304
(...skipping 250 matching lines...) Expand 10 before | Expand all | Expand 10 after
511 if (descriptor->kind() == CallDescriptor::kCallAddress && 555 if (descriptor->kind() == CallDescriptor::kCallAddress &&
512 buffer.pushed_count > 0) { 556 buffer.pushed_count > 0) {
513 ASSERT(deoptimization == NULL && continuation == NULL); 557 ASSERT(deoptimization == NULL && continuation == NULL);
514 Emit(kPopStack | MiscField::encode(buffer.pushed_count), NULL); 558 Emit(kPopStack | MiscField::encode(buffer.pushed_count), NULL);
515 } 559 }
516 } 560 }
517 561
518 } // namespace compiler 562 } // namespace compiler
519 } // namespace internal 563 } // namespace internal
520 } // namespace v8 564 } // namespace v8
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