[turbofan] Add Int32AddWithOverflow machine operator.

src/compiler/arm64/instruction-selector-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
@@ skipping 96 matching lines @@
 
 
 // Shared routine for multiple binary operations.
 static void VisitBinop(InstructionSelector* selector, Node* node,
                        ArchOpcode opcode, ImmediateMode operand_mode,
                        bool commutative) {
   VisitRRO(selector, opcode, node, operand_mode);
 }
 
 
+static void VisitBinopWithOverflow(InstructionSelector* selector, Node* node,
+                                   InstructionCode opcode) {
+  Arm64OperandGenerator g(selector);
+  Int32BinopMatcher m(node);
+  InstructionOperand* inputs[2];
+  size_t input_count = 0;
+  InstructionOperand* outputs[2];
+  size_t output_count = 0;
+
+  inputs[input_count++] = g.UseRegister(m.left().node());
+  inputs[input_count++] = g.UseRegister(m.right().node());
+
+  // Define outputs depending on the projections.
+  Node* projections[2];
+  node->CollectProjections(ARRAY_SIZE(projections), projections);
+  if (projections[0]) {
+    outputs[output_count++] = g.DefineAsRegister(projections[0]);
+  }
+  if (projections[1]) {
+    opcode |= FlagsModeField::encode(kFlags_set);
+    opcode |= FlagsConditionField::encode(kOverflow);
+    outputs[output_count++] = g.DefineAsRegister(projections[1]);
+  }
+
+  ASSERT_NE(0, input_count);
+  ASSERT_NE(0, output_count);
+  ASSERT_GE(ARRAY_SIZE(inputs), input_count);
+  ASSERT_GE(ARRAY_SIZE(outputs), output_count);
+
+  selector->Emit(opcode, output_count, outputs, input_count, inputs);
+}
+
+
 void InstructionSelector::VisitLoad(Node* node) {
   MachineRepresentation rep = OpParameter<MachineRepresentation>(node);
   Arm64OperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
   InstructionOperand* result = rep == kMachineFloat64
                                    ? g.DefineAsDoubleRegister(node)
                                    : g.DefineAsRegister(node);
 
@@ skipping 165 matching lines @@
 void InstructionSelector::VisitWord64Sar(Node* node) {
   VisitRRO(this, kArm64Sar, node, kShift64Imm);
 }
 
 
 void InstructionSelector::VisitInt32Add(Node* node) {
   VisitBinop(this, node, kArm64Add32, kArithimeticImm, true);
 }
 
 
+void InstructionSelector::VisitInt32AddWithOverflow(Node* node) {
+  VisitBinopWithOverflow(this, node, kArm64Add32);
+}
+
+
 void InstructionSelector::VisitInt64Add(Node* node) {
   VisitBinop(this, node, kArm64Add, kArithimeticImm, true);
 }
 
 
 template <typename T>
 static void VisitSub(InstructionSelector* selector, Node* node,
                      ArchOpcode sub_opcode, ArchOpcode neg_opcode) {
   Arm64OperandGenerator g(selector);
   BinopMatcher<IntMatcher<T>, IntMatcher<T> > m(node);
@@ skipping 299 matching lines @@
   // Caller clean up of stack for C-style calls.
   if (is_c_frame && aligned_push_count > 0) {
     ASSERT(deoptimization == NULL && continuation == NULL);
     Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL);
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8