[turbofan] Add Int32AddWithOverflow machine operator.

src/compiler/arm/instruction-selector-arm.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector-impl.h"
 #include "src/compiler/node-matchers.h"
 #include "src/compiler-intrinsics.h"
 
 namespace v8 {
 namespace internal {
@@ skipping 229 matching lines @@
 }
 
 
 // Shared routine for multiple binary operations.
 static void VisitBinop(InstructionSelector* selector, Node* node,
                        InstructionCode opcode, InstructionCode reverse_opcode) {
   ArmOperandGenerator g(selector);
   Int32BinopMatcher m(node);
   InstructionOperand* inputs[3];
   size_t input_count = 0;
+  InstructionOperand* outputs[1] = {g.DefineAsRegister(node)};
+  const size_t output_count = ARRAY_SIZE(outputs);
 
   if (TryMatchImmediateOrShift(selector, &opcode, m.right().node(),
                                &input_count, &inputs[1])) {
     inputs[0] = g.UseRegister(m.left().node());
     input_count++;
   } else if (TryMatchImmediateOrShift(selector, &reverse_opcode,
                                       m.left().node(), &input_count,
                                       &inputs[1])) {
     inputs[0] = g.UseRegister(m.right().node());
     opcode = reverse_opcode;
     input_count++;
   } else {
     opcode |= AddressingModeField::encode(kMode_Operand2_R);
     inputs[input_count++] = g.UseRegister(m.left().node());
     inputs[input_count++] = g.UseRegister(m.right().node());
   }
 
   ASSERT_NE(0, input_count);
   ASSERT_GE(ARRAY_SIZE(inputs), input_count);
   ASSERT_NE(kMode_None, AddressingModeField::decode(opcode));
 
-  InstructionOperand* outputs[1] = {g.DefineAsRegister(node)};
-  const size_t output_count = ARRAY_SIZE(outputs);
   selector->Emit(opcode, output_count, outputs, input_count, inputs);
 }
 
+
+static void VisitBinopWithOverflow(InstructionSelector* selector, Node* node,
+                                   InstructionCode opcode,
+                                   InstructionCode reverse_opcode) {
+  ArmOperandGenerator g(selector);
+  Int32BinopMatcher m(node);
+  InstructionOperand* inputs[3];
+  size_t input_count = 0;
+  InstructionOperand* outputs[2];
+  size_t output_count = 0;
+
+  if (TryMatchImmediateOrShift(selector, &opcode, m.right().node(),
+                               &input_count, &inputs[1])) {
+    inputs[0] = g.UseRegister(m.left().node());
+    input_count++;
+  } else if (TryMatchImmediateOrShift(selector, &reverse_opcode,
+                                      m.left().node(), &input_count,
+                                      &inputs[1])) {
+    inputs[0] = g.UseRegister(m.right().node());
+    opcode = reverse_opcode;
+    input_count++;
+  } else {
+    opcode |= AddressingModeField::encode(kMode_Operand2_R);
+    inputs[input_count++] = g.UseRegister(m.left().node());
+    inputs[input_count++] = g.UseRegister(m.right().node());
+  }
+
+  // Define outputs depending on the projections.
+  Node* projections[2];
+  node->CollectProjections(ARRAY_SIZE(projections), projections);
+  if (projections[0]) {
+    outputs[output_count++] = g.DefineAsRegister(projections[0]);
+  }
+  if (projections[1]) {
+    opcode |= FlagsModeField::encode(kFlags_set);
+    opcode |= FlagsConditionField::encode(kOverflow);
+    outputs[output_count++] = g.DefineAsRegister(projections[1]);
+  }
+
+  ASSERT_NE(0, input_count);
+  ASSERT_NE(0, output_count);
+  ASSERT_GE(ARRAY_SIZE(inputs), input_count);
+  ASSERT_GE(ARRAY_SIZE(outputs), output_count);
+  ASSERT_NE(kMode_None, AddressingModeField::decode(opcode));
+
+  selector->Emit(opcode, output_count, outputs, input_count, inputs);
+}
+
 
 void InstructionSelector::VisitLoad(Node* node) {
   MachineRepresentation rep = OpParameter<MachineRepresentation>(node);
   ArmOperandGenerator g(this);
   Node* base = node->InputAt(0);
   Node* index = node->InputAt(1);
 
   InstructionOperand* result = rep == kMachineFloat64
                                    ? g.DefineAsDoubleRegister(node)
                                    : g.DefineAsRegister(node);
@@ skipping 246 matching lines @@
   if (m.right().IsInt32Mul() && CanCover(node, m.right().node())) {
     Int32BinopMatcher mright(m.right().node());
     Emit(kArmMla, g.DefineAsRegister(node), g.UseRegister(mright.left().node()),
          g.UseRegister(mright.right().node()), g.UseRegister(m.left().node()));
     return;
   }
   VisitBinop(this, node, kArmAdd, kArmAdd);
 }
 
 
+void InstructionSelector::VisitInt32AddWithOverflow(Node* node) {
+  VisitBinopWithOverflow(this, node, kArmAdd, kArmAdd);
+}
+
+
 void InstructionSelector::VisitInt32Sub(Node* node) {
   ArmOperandGenerator g(this);
   Int32BinopMatcher m(node);
   if (CpuFeatures::IsSupported(MLS) && m.right().IsInt32Mul() &&
       CanCover(node, m.right().node())) {
     Int32BinopMatcher mright(m.right().node());
     Emit(kArmMls, g.DefineAsRegister(node), g.UseRegister(mright.left().node()),
          g.UseRegister(mright.right().node()), g.UseRegister(m.left().node()));
     return;
   }
@@ skipping 342 matching lines @@
     ASSERT(cont->IsSet());
     Emit(cont->Encode(kArmVcmpF64), g.DefineAsRegister(cont->result()),
          g.UseDoubleRegister(m.left().node()),
          g.UseDoubleRegister(m.right().node()));
   }
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8