[turbofan] Add support for Int32SubWithOverflow.

src/compiler/arm64/code-generator-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/arm64/macro-assembler-arm64.h"
 #include "src/compiler/code-generator-impl.h"
 #include "src/compiler/gap-resolver.h"
 #include "src/compiler/node-matchers.h"
@@ skipping 225 matching lines @@
     case kArm64Xor:
       __ Eor(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
       break;
     case kArm64Xor32:
       __ Eor(i.OutputRegister32(), i.InputRegister32(0), i.InputOperand32(1));
       break;
     case kArm64Sub:
       __ Sub(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
       break;
     case kArm64Sub32:
-      __ Sub(i.OutputRegister32(), i.InputRegister32(0), i.InputOperand32(1));
+      if (FlagsModeField::decode(opcode) != kFlags_none) {
+        __ Subs(i.OutputRegister32(), i.InputRegister32(0),
+                i.InputOperand32(1));
+      } else {
+        __ Sub(i.OutputRegister32(), i.InputRegister32(0), i.InputOperand32(1));
+      }
       break;
     case kArm64Shl:
       ASSEMBLE_SHIFT(Lsl, 64);
       break;
     case kArm64Shl32:
       ASSEMBLE_SHIFT(Lsl, 32);
       break;
     case kArm64Shr:
       ASSEMBLE_SHIFT(Lsr, 64);
       break;
@@ skipping 584 matching lines @@
   v8::internal::Instruction* instr =
       reinterpret_cast<v8::internal::Instruction*>(instr_address);
   return instr->IsMovz() && instr->Rd() == xzr.code() && instr->SixtyFourBits();
 }
 
 #endif  // DEBUG
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8