TF: Add ConvertFloat64ToUint32 and ConvertUint32ToFloat64 machine operators.

src/compiler/x64/instruction-selector-x64.cc

Index: src/compiler/x64/instruction-selector-x64.cc
diff --git a/src/compiler/x64/instruction-selector-x64.cc b/src/compiler/x64/instruction-selector-x64.cc
index 7d71ace1e69d062bbddf055628bd057bf5b9f397..d40bc6750bdc29970a88222f620d9be3bdd18056 100644
--- a/src/compiler/x64/instruction-selector-x64.cc
+++ b/src/compiler/x64/instruction-selector-x64.cc
@@ -450,12 +450,28 @@ void InstructionSelector::VisitConvertInt32ToFloat64(Node* node) {
 }
 
 
+void InstructionSelector::VisitConvertUint32ToFloat64(Node* node) {
+  X64OperandGenerator g(this);
+  // TODO(turbofan): X64 SSE cvtqsi2sd should support operands.
+  Emit(kSSEUint32ToFloat64, g.DefineAsDoubleRegister(node),
+       g.UseRegister(node->InputAt(0)));
+}
+
+
 void InstructionSelector::VisitConvertFloat64ToInt32(Node* node) {
   X64OperandGenerator g(this);
   Emit(kSSEFloat64ToInt32, g.DefineAsRegister(node), g.Use(node->InputAt(0)));
 }
 
 
+void InstructionSelector::VisitConvertFloat64ToUint32(Node* node) {
+  X64OperandGenerator g(this);
+  // TODO(turbofan): X64 SSE cvttsd2siq should support operands.
+  Emit(kSSEFloat64ToUint32, g.DefineAsRegister(node),
+       g.UseDoubleRegister(node->InputAt(0)));
+}
+
+
 void InstructionSelector::VisitFloat64Add(Node* node) {
   X64OperandGenerator g(this);
   Emit(kSSEFloat64Add, g.DefineSameAsFirst(node),