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Side by Side Diff: src/compiler/ia32/instruction-codes-ia32.h

Issue 431473004: TF: Add ConvertFloat64ToUint32 and ConvertUint32ToFloat64 machine operators. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 5 #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 6 #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 21 matching lines...) Expand all
32 V(IA32CallAddress) \ 32 V(IA32CallAddress) \
33 V(PopStack) \ 33 V(PopStack) \
34 V(IA32CallJSFunction) \ 34 V(IA32CallJSFunction) \
35 V(SSEFloat64Cmp) \ 35 V(SSEFloat64Cmp) \
36 V(SSEFloat64Add) \ 36 V(SSEFloat64Add) \
37 V(SSEFloat64Sub) \ 37 V(SSEFloat64Sub) \
38 V(SSEFloat64Mul) \ 38 V(SSEFloat64Mul) \
39 V(SSEFloat64Div) \ 39 V(SSEFloat64Div) \
40 V(SSEFloat64Mod) \ 40 V(SSEFloat64Mod) \
41 V(SSEFloat64ToInt32) \ 41 V(SSEFloat64ToInt32) \
42 V(SSEFloat64ToUint32) \
42 V(SSEInt32ToFloat64) \ 43 V(SSEInt32ToFloat64) \
44 V(SSEUint32ToFloat64) \
43 V(SSELoad) \ 45 V(SSELoad) \
44 V(SSEStore) \ 46 V(SSEStore) \
45 V(IA32LoadWord8) \ 47 V(IA32LoadWord8) \
46 V(IA32StoreWord8) \ 48 V(IA32StoreWord8) \
47 V(IA32StoreWord8I) \ 49 V(IA32StoreWord8I) \
48 V(IA32LoadWord16) \ 50 V(IA32LoadWord16) \
49 V(IA32StoreWord16) \ 51 V(IA32StoreWord16) \
50 V(IA32StoreWord16I) \ 52 V(IA32StoreWord16I) \
51 V(IA32LoadWord32) \ 53 V(IA32LoadWord32) \
52 V(IA32StoreWord32) \ 54 V(IA32StoreWord32) \
(...skipping 24 matching lines...) Expand all
77 V(MR1I) /* [%r0 + %r1 * 1 + K] */ \ 79 V(MR1I) /* [%r0 + %r1 * 1 + K] */ \
78 V(MR2I) /* [%r0 + %r1 * 2 + K] */ \ 80 V(MR2I) /* [%r0 + %r1 * 2 + K] */ \
79 V(MR4I) /* [%r0 + %r1 * 4 + K] */ \ 81 V(MR4I) /* [%r0 + %r1 * 4 + K] */ \
80 V(MR8I) /* [%r0 + %r1 * 8 + K] */ 82 V(MR8I) /* [%r0 + %r1 * 8 + K] */
81 83
82 } // namespace compiler 84 } // namespace compiler
83 } // namespace internal 85 } // namespace internal
84 } // namespace v8 86 } // namespace v8
85 87
86 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ 88 #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_
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