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Side by Side Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 431473004: TF: Add ConvertFloat64ToUint32 and ConvertUint32ToFloat64 machine operators. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector-impl.h" 5 #include "src/compiler/instruction-selector-impl.h"
6 #include "src/compiler/node-matchers.h" 6 #include "src/compiler/node-matchers.h"
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
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388 } 388 }
389 389
390 390
391 void InstructionSelector::VisitConvertInt32ToFloat64(Node* node) { 391 void InstructionSelector::VisitConvertInt32ToFloat64(Node* node) {
392 Arm64OperandGenerator g(this); 392 Arm64OperandGenerator g(this);
393 Emit(kArm64Int32ToFloat64, g.DefineAsDoubleRegister(node), 393 Emit(kArm64Int32ToFloat64, g.DefineAsDoubleRegister(node),
394 g.UseRegister(node->InputAt(0))); 394 g.UseRegister(node->InputAt(0)));
395 } 395 }
396 396
397 397
398 void InstructionSelector::VisitConvertUint32ToFloat64(Node* node) {
399 Arm64OperandGenerator g(this);
400 Emit(kArm64Uint32ToFloat64, g.DefineAsDoubleRegister(node),
401 g.UseRegister(node->InputAt(0)));
402 }
403
404
398 void InstructionSelector::VisitConvertFloat64ToInt32(Node* node) { 405 void InstructionSelector::VisitConvertFloat64ToInt32(Node* node) {
399 Arm64OperandGenerator g(this); 406 Arm64OperandGenerator g(this);
400 Emit(kArm64Float64ToInt32, g.DefineAsRegister(node), 407 Emit(kArm64Float64ToInt32, g.DefineAsRegister(node),
401 g.UseDoubleRegister(node->InputAt(0))); 408 g.UseDoubleRegister(node->InputAt(0)));
402 } 409 }
403 410
404 411
412 void InstructionSelector::VisitConvertFloat64ToUint32(Node* node) {
413 Arm64OperandGenerator g(this);
414 Emit(kArm64Float64ToUint32, g.DefineAsRegister(node),
415 g.UseDoubleRegister(node->InputAt(0)));
416 }
417
418
405 void InstructionSelector::VisitFloat64Add(Node* node) { 419 void InstructionSelector::VisitFloat64Add(Node* node) {
406 VisitRRRFloat64(this, kArm64Float64Add, node); 420 VisitRRRFloat64(this, kArm64Float64Add, node);
407 } 421 }
408 422
409 423
410 void InstructionSelector::VisitFloat64Sub(Node* node) { 424 void InstructionSelector::VisitFloat64Sub(Node* node) {
411 VisitRRRFloat64(this, kArm64Float64Sub, node); 425 VisitRRRFloat64(this, kArm64Float64Sub, node);
412 } 426 }
413 427
414 428
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597 // Caller clean up of stack for C-style calls. 611 // Caller clean up of stack for C-style calls.
598 if (is_c_frame && aligned_push_count > 0) { 612 if (is_c_frame && aligned_push_count > 0) {
599 ASSERT(deoptimization == NULL && continuation == NULL); 613 ASSERT(deoptimization == NULL && continuation == NULL);
600 Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL); 614 Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL);
601 } 615 }
602 } 616 }
603 617
604 } // namespace compiler 618 } // namespace compiler
605 } // namespace internal 619 } // namespace internal
606 } // namespace v8 620 } // namespace v8
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