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Side by Side Diff: src/compiler/arm64/code-generator-arm64.cc

Issue 431473004: TF: Add ConvertFloat64ToUint32 and ConvertUint32ToFloat64 machine operators. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 6 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/arm64/macro-assembler-arm64.h" 7 #include "src/arm64/macro-assembler-arm64.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
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371 __ Sxtw(i.OutputRegister(), i.InputRegister(0)); 371 __ Sxtw(i.OutputRegister(), i.InputRegister(0));
372 break; 372 break;
373 case kArm64Int64ToInt32: 373 case kArm64Int64ToInt32:
374 if (!i.OutputRegister().is(i.InputRegister(0))) { 374 if (!i.OutputRegister().is(i.InputRegister(0))) {
375 __ Mov(i.OutputRegister(), i.InputRegister(0)); 375 __ Mov(i.OutputRegister(), i.InputRegister(0));
376 } 376 }
377 break; 377 break;
378 case kArm64Float64ToInt32: 378 case kArm64Float64ToInt32:
379 __ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0)); 379 __ Fcvtzs(i.OutputRegister32(), i.InputDoubleRegister(0));
380 break; 380 break;
381 case kArm64Float64ToUint32:
382 __ Fcvtzu(i.OutputRegister32(), i.InputDoubleRegister(0));
383 break;
381 case kArm64Int32ToFloat64: 384 case kArm64Int32ToFloat64:
382 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister32(0)); 385 __ Scvtf(i.OutputDoubleRegister(), i.InputRegister32(0));
383 break; 386 break;
387 case kArm64Uint32ToFloat64:
388 __ Ucvtf(i.OutputDoubleRegister(), i.InputRegister32(0));
389 break;
384 case kArm64LoadWord8: 390 case kArm64LoadWord8:
385 __ Ldrb(i.OutputRegister(), i.MemoryOperand()); 391 __ Ldrb(i.OutputRegister(), i.MemoryOperand());
386 break; 392 break;
387 case kArm64StoreWord8: 393 case kArm64StoreWord8:
388 __ Strb(i.InputRegister(2), i.MemoryOperand()); 394 __ Strb(i.InputRegister(2), i.MemoryOperand());
389 break; 395 break;
390 case kArm64LoadWord16: 396 case kArm64LoadWord16:
391 __ Ldrh(i.OutputRegister(), i.MemoryOperand()); 397 __ Ldrh(i.OutputRegister(), i.MemoryOperand());
392 break; 398 break;
393 case kArm64StoreWord16: 399 case kArm64StoreWord16:
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816 v8::internal::Instruction* instr = 822 v8::internal::Instruction* instr =
817 reinterpret_cast<v8::internal::Instruction*>(instr_address); 823 reinterpret_cast<v8::internal::Instruction*>(instr_address);
818 return instr->IsMovz() && instr->Rd() == xzr.code() && instr->SixtyFourBits(); 824 return instr->IsMovz() && instr->Rd() == xzr.code() && instr->SixtyFourBits();
819 } 825 }
820 826
821 #endif // DEBUG 827 #endif // DEBUG
822 828
823 } // namespace compiler 829 } // namespace compiler
824 } // namespace internal 830 } // namespace internal
825 } // namespace v8 831 } // namespace v8
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