| Index: src/compiler/arm/instruction-selector-arm.cc | 
| diff --git a/src/compiler/arm/instruction-selector-arm.cc b/src/compiler/arm/instruction-selector-arm.cc | 
| index d60eee7a671d0627acc85df79d2a1d5e836d5fb0..72eabf6388f172c81389678f80003b71c767a762 100644 | 
| --- a/src/compiler/arm/instruction-selector-arm.cc | 
| +++ b/src/compiler/arm/instruction-selector-arm.cc | 
| @@ -285,11 +285,11 @@ static void VisitBinop(InstructionSelector* selector, Node* node, | 
| outputs[output_count++] = g.DefineAsRegister(cont->result()); | 
| } | 
|  | 
| -  ASSERT_NE(0, input_count); | 
| -  ASSERT_NE(0, output_count); | 
| -  ASSERT_GE(ARRAY_SIZE(inputs), input_count); | 
| -  ASSERT_GE(ARRAY_SIZE(outputs), output_count); | 
| -  ASSERT_NE(kMode_None, AddressingModeField::decode(opcode)); | 
| +  DCHECK_NE(0, input_count); | 
| +  DCHECK_NE(0, output_count); | 
| +  DCHECK_GE(ARRAY_SIZE(inputs), input_count); | 
| +  DCHECK_GE(ARRAY_SIZE(outputs), output_count); | 
| +  DCHECK_NE(kMode_None, AddressingModeField::decode(opcode)); | 
|  | 
| Instruction* instr = selector->Emit(cont->Encode(opcode), output_count, | 
| outputs, input_count, inputs); | 
| @@ -356,7 +356,7 @@ void InstructionSelector::VisitStore(Node* node) { | 
| StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); | 
| MachineRepresentation rep = store_rep.rep; | 
| if (store_rep.write_barrier_kind == kFullWriteBarrier) { | 
| -    ASSERT(rep == kMachineTagged); | 
| +    DCHECK(rep == kMachineTagged); | 
| // TODO(dcarney): refactor RecordWrite function to take temp registers | 
| //                and pass them here instead of using fixed regs | 
| // TODO(dcarney): handle immediate indices. | 
| @@ -366,7 +366,7 @@ void InstructionSelector::VisitStore(Node* node) { | 
| temps); | 
| return; | 
| } | 
| -  ASSERT_EQ(kNoWriteBarrier, store_rep.write_barrier_kind); | 
| +  DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind); | 
| InstructionOperand* val = rep == kMachineFloat64 ? g.UseDoubleRegister(value) | 
| : g.UseRegister(value); | 
|  | 
| @@ -442,7 +442,7 @@ void InstructionSelector::VisitWord32And(Node* node) { | 
| uint32_t width = CompilerIntrinsics::CountSetBits(value); | 
| uint32_t msb = CompilerIntrinsics::CountLeadingZeros(value); | 
| if (width != 0 && msb + width == 32) { | 
| -      ASSERT_EQ(0, CompilerIntrinsics::CountTrailingZeros(value)); | 
| +      DCHECK_EQ(0, CompilerIntrinsics::CountTrailingZeros(value)); | 
| if (m.left().IsWord32Shr()) { | 
| Int32BinopMatcher mleft(m.left().node()); | 
| if (mleft.right().IsInRange(0, 31)) { | 
| @@ -534,7 +534,7 @@ void InstructionSelector::VisitWord32Shr(Node* node) { | 
| uint32_t width = CompilerIntrinsics::CountSetBits(value); | 
| uint32_t msb = CompilerIntrinsics::CountLeadingZeros(value); | 
| if (msb + width + lsb == 32) { | 
| -        ASSERT_EQ(lsb, CompilerIntrinsics::CountTrailingZeros(value)); | 
| +        DCHECK_EQ(lsb, CompilerIntrinsics::CountTrailingZeros(value)); | 
| Emit(kArmUbfx, g.DefineAsRegister(node), | 
| g.UseRegister(mleft.left().node()), g.TempImmediate(lsb), | 
| g.TempImmediate(width)); | 
| @@ -817,14 +817,14 @@ void InstructionSelector::VisitCall(Node* call, BasicBlock* continuation, | 
|  | 
| call_instr->MarkAsCall(); | 
| if (deoptimization != NULL) { | 
| -    ASSERT(continuation != NULL); | 
| +    DCHECK(continuation != NULL); | 
| call_instr->MarkAsControl(); | 
| } | 
|  | 
| // Caller clean up of stack for C-style calls. | 
| if (descriptor->kind() == CallDescriptor::kCallAddress && | 
| buffer.pushed_count > 0) { | 
| -    ASSERT(deoptimization == NULL && continuation == NULL); | 
| +    DCHECK(deoptimization == NULL && continuation == NULL); | 
| Emit(kArmDrop | MiscField::encode(buffer.pushed_count), NULL); | 
| } | 
| } | 
| @@ -872,13 +872,13 @@ static void VisitWordCompare(InstructionSelector* selector, Node* node, | 
| inputs[input_count++] = g.Label(cont->true_block()); | 
| inputs[input_count++] = g.Label(cont->false_block()); | 
| } else { | 
| -    ASSERT(cont->IsSet()); | 
| +    DCHECK(cont->IsSet()); | 
| outputs[output_count++] = g.DefineAsRegister(cont->result()); | 
| } | 
|  | 
| -  ASSERT_NE(0, input_count); | 
| -  ASSERT_GE(ARRAY_SIZE(inputs), input_count); | 
| -  ASSERT_GE(ARRAY_SIZE(outputs), output_count); | 
| +  DCHECK_NE(0, input_count); | 
| +  DCHECK_GE(ARRAY_SIZE(inputs), input_count); | 
| +  DCHECK_GE(ARRAY_SIZE(outputs), output_count); | 
|  | 
| Instruction* instr = selector->Emit(cont->Encode(opcode), output_count, | 
| outputs, input_count, inputs); | 
| @@ -931,7 +931,7 @@ void InstructionSelector::VisitFloat64Compare(Node* node, | 
| g.UseDoubleRegister(m.right().node()), g.Label(cont->true_block()), | 
| g.Label(cont->false_block()))->MarkAsControl(); | 
| } else { | 
| -    ASSERT(cont->IsSet()); | 
| +    DCHECK(cont->IsSet()); | 
| Emit(cont->Encode(kArmVcmpF64), g.DefineAsRegister(cont->result()), | 
| g.UseDoubleRegister(m.left().node()), | 
| g.UseDoubleRegister(m.right().node())); | 
|  |