src/arm/macro-assembler-arm.cc - Issue 430503007: Rename ASSERT* to DCHECK*.

Unified Diff: src/arm/macro-assembler-arm.cc

Issue 430503007: Rename ASSERT* to DCHECK*. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge

Patch Set: REBASE and fixes Created 6 years, 4 months ago

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Index: src/arm/macro-assembler-arm.cc

diff --git a/src/arm/macro-assembler-arm.cc b/src/arm/macro-assembler-arm.cc

index c1b34053758172ad731953ddbbeb25794adbc6da..4b3cb4e860a0146948f53e3d5be9e7b985558ae7 100644

--- a/src/arm/macro-assembler-arm.cc

+++ b/src/arm/macro-assembler-arm.cc

@@ -36,21 +36,21 @@ void MacroAssembler::Jump(Register target, Condition cond) {

void MacroAssembler::Jump(intptr_t target, RelocInfo::Mode rmode,

Condition cond) {

- ASSERT(RelocInfo::IsCodeTarget(rmode));

+ DCHECK(RelocInfo::IsCodeTarget(rmode));

mov(pc, Operand(target, rmode), LeaveCC, cond);

}

void MacroAssembler::Jump(Address target, RelocInfo::Mode rmode,

Condition cond) {

- ASSERT(!RelocInfo::IsCodeTarget(rmode));

+ DCHECK(!RelocInfo::IsCodeTarget(rmode));

Jump(reinterpret_cast<intptr_t>(target), rmode, cond);

}

void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode,

Condition cond) {

- ASSERT(RelocInfo::IsCodeTarget(rmode));

+ DCHECK(RelocInfo::IsCodeTarget(rmode));

// 'code' is always generated ARM code, never THUMB code

AllowDeferredHandleDereference embedding_raw_address;

Jump(reinterpret_cast<intptr_t>(code.location()), rmode, cond);

@@ -68,7 +68,7 @@ void MacroAssembler::Call(Register target, Condition cond) {

Label start;

bind(&start);

blx(target, cond);

- ASSERT_EQ(CallSize(target, cond), SizeOfCodeGeneratedSince(&start));

+ DCHECK_EQ(CallSize(target, cond), SizeOfCodeGeneratedSince(&start));

}

@@ -138,7 +138,7 @@ void MacroAssembler::Call(Address target,

mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode));

blx(ip, cond);

- ASSERT_EQ(expected_size, SizeOfCodeGeneratedSince(&start));

+ DCHECK_EQ(expected_size, SizeOfCodeGeneratedSince(&start));

if (mode == NEVER_INLINE_TARGET_ADDRESS) {

set_predictable_code_size(old_predictable_code_size);

}

@@ -161,7 +161,7 @@ void MacroAssembler::Call(Handle<Code> code,

TargetAddressStorageMode mode) {

Label start;

bind(&start);

- ASSERT(RelocInfo::IsCodeTarget(rmode));

+ DCHECK(RelocInfo::IsCodeTarget(rmode));

if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {

SetRecordedAstId(ast_id);

rmode = RelocInfo::CODE_TARGET_WITH_ID;

@@ -222,7 +222,7 @@ void MacroAssembler::Move(Register dst, Handle<Object> value) {

if (value->IsSmi()) {

mov(dst, Operand(value));

} else {

- ASSERT(value->IsHeapObject());

+ DCHECK(value->IsHeapObject());

if (isolate()->heap()->InNewSpace(*value)) {

Handle<Cell> cell = isolate()->factory()->NewCell(value);

mov(dst, Operand(cell));

@@ -254,7 +254,7 @@ void MacroAssembler::Mls(Register dst, Register src1, Register src2,

CpuFeatureScope scope(this, MLS);

mls(dst, src1, src2, srcA, cond);

} else {

- ASSERT(!srcA.is(ip));

+ DCHECK(!srcA.is(ip));

mul(ip, src1, src2, LeaveCC, cond);

sub(dst, srcA, ip, LeaveCC, cond);

}

@@ -281,7 +281,7 @@ void MacroAssembler::And(Register dst, Register src1, const Operand& src2,

void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,

Condition cond) {

- ASSERT(lsb < 32);

+ DCHECK(lsb < 32);

if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {

int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);

and_(dst, src1, Operand(mask), LeaveCC, cond);

@@ -296,7 +296,7 @@ void MacroAssembler::Ubfx(Register dst, Register src1, int lsb, int width,

void MacroAssembler::Sbfx(Register dst, Register src1, int lsb, int width,

Condition cond) {

- ASSERT(lsb < 32);

+ DCHECK(lsb < 32);

if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {

int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);

and_(dst, src1, Operand(mask), LeaveCC, cond);

@@ -320,10 +320,10 @@ void MacroAssembler::Bfi(Register dst,

int lsb,

int width,

Condition cond) {

- ASSERT(0 <= lsb && lsb < 32);

- ASSERT(0 <= width && width < 32);

- ASSERT(lsb + width < 32);

- ASSERT(!scratch.is(dst));

+ DCHECK(0 <= lsb && lsb < 32);

+ DCHECK(0 <= width && width < 32);

+ DCHECK(lsb + width < 32);

+ DCHECK(!scratch.is(dst));

if (width == 0) return;

if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {

int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);

@@ -339,7 +339,7 @@ void MacroAssembler::Bfi(Register dst,

void MacroAssembler::Bfc(Register dst, Register src, int lsb, int width,

Condition cond) {

- ASSERT(lsb < 32);

+ DCHECK(lsb < 32);

if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {

int mask = (1 << (width + lsb)) - 1 - ((1 << lsb) - 1);

bic(dst, src, Operand(mask));

@@ -353,13 +353,13 @@ void MacroAssembler::Bfc(Register dst, Register src, int lsb, int width,

void MacroAssembler::Usat(Register dst, int satpos, const Operand& src,

Condition cond) {

if (!CpuFeatures::IsSupported(ARMv7) || predictable_code_size()) {

- ASSERT(!dst.is(pc) && !src.rm().is(pc));

- ASSERT((satpos >= 0) && (satpos <= 31));

+ DCHECK(!dst.is(pc) && !src.rm().is(pc));

+ DCHECK((satpos >= 0) && (satpos <= 31));

// These asserts are required to ensure compatibility with the ARMv7

// implementation.

- ASSERT((src.shift_op() == ASR) || (src.shift_op() == LSL));

- ASSERT(src.rs().is(no_reg));

+ DCHECK((src.shift_op() == ASR) || (src.shift_op() == LSL));

+ DCHECK(src.rs().is(no_reg));

Label done;

int satval = (1 << satpos) - 1;

@@ -384,7 +384,7 @@ void MacroAssembler::Usat(Register dst, int satpos, const Operand& src,

void MacroAssembler::Load(Register dst,

const MemOperand& src,

Representation r) {

- ASSERT(!r.IsDouble());

+ DCHECK(!r.IsDouble());

if (r.IsInteger8()) {

ldrsb(dst, src);

} else if (r.IsUInteger8()) {

@@ -402,7 +402,7 @@ void MacroAssembler::Load(Register dst,

void MacroAssembler::Store(Register src,

const MemOperand& dst,

Representation r) {

- ASSERT(!r.IsDouble());

+ DCHECK(!r.IsDouble());

if (r.IsInteger8() || r.IsUInteger8()) {

strb(src, dst);

} else if (r.IsInteger16() || r.IsUInteger16()) {

@@ -445,7 +445,7 @@ void MacroAssembler::InNewSpace(Register object,

Condition cond,

Label* branch) {

- ASSERT(cond == eq || cond == ne);

+ DCHECK(cond == eq || cond == ne);

and_(scratch, object, Operand(ExternalReference::new_space_mask(isolate())));

cmp(scratch, Operand(ExternalReference::new_space_start(isolate())));

b(cond, branch);

@@ -473,7 +473,7 @@ void MacroAssembler::RecordWriteField(

// Although the object register is tagged, the offset is relative to the start

// of the object, so so offset must be a multiple of kPointerSize.

- ASSERT(IsAligned(offset, kPointerSize));

+ DCHECK(IsAligned(offset, kPointerSize));

add(dst, object, Operand(offset - kHeapObjectTag));

if (emit_debug_code()) {

@@ -586,7 +586,7 @@ void MacroAssembler::RecordWrite(

RememberedSetAction remembered_set_action,

SmiCheck smi_check,

PointersToHereCheck pointers_to_here_check_for_value) {

- ASSERT(!object.is(value));

+ DCHECK(!object.is(value));

if (emit_debug_code()) {

ldr(ip, MemOperand(address));

cmp(ip, value);

@@ -673,7 +673,7 @@ void MacroAssembler::RememberedSetHelper(Register object, // For debug tests.

if (and_then == kFallThroughAtEnd) {

b(eq, &done);

} else {

- ASSERT(and_then == kReturnAtEnd);

+ DCHECK(and_then == kReturnAtEnd);

Ret(eq);

}

push(lr);

@@ -689,7 +689,7 @@ void MacroAssembler::RememberedSetHelper(Register object, // For debug tests.

void MacroAssembler::PushFixedFrame(Register marker_reg) {

- ASSERT(!marker_reg.is_valid() || marker_reg.code() < cp.code());

+ DCHECK(!marker_reg.is_valid() || marker_reg.code() < cp.code());

stm(db_w, sp, (marker_reg.is_valid() ? marker_reg.bit() : 0) |

cp.bit() |

(FLAG_enable_ool_constant_pool ? pp.bit() : 0) |

@@ -699,7 +699,7 @@ void MacroAssembler::PushFixedFrame(Register marker_reg) {

void MacroAssembler::PopFixedFrame(Register marker_reg) {

- ASSERT(!marker_reg.is_valid() || marker_reg.code() < cp.code());

+ DCHECK(!marker_reg.is_valid() || marker_reg.code() < cp.code());

ldm(ia_w, sp, (marker_reg.is_valid() ? marker_reg.bit() : 0) |

cp.bit() |

(FLAG_enable_ool_constant_pool ? pp.bit() : 0) |

@@ -711,11 +711,11 @@ void MacroAssembler::PopFixedFrame(Register marker_reg) {

// Push and pop all registers that can hold pointers.

void MacroAssembler::PushSafepointRegisters() {

// Safepoints expect a block of contiguous register values starting with r0:

- ASSERT(((1 << kNumSafepointSavedRegisters) - 1) == kSafepointSavedRegisters);

+ DCHECK(((1 << kNumSafepointSavedRegisters) - 1) == kSafepointSavedRegisters);

// Safepoints expect a block of kNumSafepointRegisters values on the

// stack, so adjust the stack for unsaved registers.

const int num_unsaved = kNumSafepointRegisters - kNumSafepointSavedRegisters;

- ASSERT(num_unsaved >= 0);

+ DCHECK(num_unsaved >= 0);

sub(sp, sp, Operand(num_unsaved * kPointerSize));

stm(db_w, sp, kSafepointSavedRegisters);

}

@@ -741,7 +741,7 @@ void MacroAssembler::LoadFromSafepointRegisterSlot(Register dst, Register src) {

int MacroAssembler::SafepointRegisterStackIndex(int reg_code) {

// The registers are pushed starting with the highest encoding,

// which means that lowest encodings are closest to the stack pointer.

- ASSERT(reg_code >= 0 && reg_code < kNumSafepointRegisters);

+ DCHECK(reg_code >= 0 && reg_code < kNumSafepointRegisters);

return reg_code;

}

@@ -753,7 +753,7 @@ MemOperand MacroAssembler::SafepointRegisterSlot(Register reg) {

MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {

// Number of d-regs not known at snapshot time.

- ASSERT(!serializer_enabled());

+ DCHECK(!serializer_enabled());

// General purpose registers are pushed last on the stack.

int doubles_size = DwVfpRegister::NumAllocatableRegisters() * kDoubleSize;

int register_offset = SafepointRegisterStackIndex(reg.code()) * kPointerSize;

@@ -763,12 +763,12 @@ MemOperand MacroAssembler::SafepointRegistersAndDoublesSlot(Register reg) {

void MacroAssembler::Ldrd(Register dst1, Register dst2,

const MemOperand& src, Condition cond) {

- ASSERT(src.rm().is(no_reg));

- ASSERT(!dst1.is(lr)); // r14.

+ DCHECK(src.rm().is(no_reg));

+ DCHECK(!dst1.is(lr)); // r14.

// V8 does not use this addressing mode, so the fallback code

// below doesn't support it yet.

- ASSERT((src.am() != PreIndex) && (src.am() != NegPreIndex));

+ DCHECK((src.am() != PreIndex) && (src.am() != NegPreIndex));

// Generate two ldr instructions if ldrd is not available.

if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size() &&

@@ -787,7 +787,7 @@ void MacroAssembler::Ldrd(Register dst1, Register dst2,

ldr(dst2, src2, cond);

}

} else { // PostIndex or NegPostIndex.

- ASSERT((src.am() == PostIndex) || (src.am() == NegPostIndex));

+ DCHECK((src.am() == PostIndex) || (src.am() == NegPostIndex));

if (dst1.is(src.rn())) {

ldr(dst2, MemOperand(src.rn(), 4, Offset), cond);

ldr(dst1, src, cond);

@@ -804,12 +804,12 @@ void MacroAssembler::Ldrd(Register dst1, Register dst2,

void MacroAssembler::Strd(Register src1, Register src2,

const MemOperand& dst, Condition cond) {

- ASSERT(dst.rm().is(no_reg));

- ASSERT(!src1.is(lr)); // r14.

+ DCHECK(dst.rm().is(no_reg));

+ DCHECK(!src1.is(lr)); // r14.

// V8 does not use this addressing mode, so the fallback code

// below doesn't support it yet.

- ASSERT((dst.am() != PreIndex) && (dst.am() != NegPreIndex));

+ DCHECK((dst.am() != PreIndex) && (dst.am() != NegPreIndex));

// Generate two str instructions if strd is not available.

if (CpuFeatures::IsSupported(ARMv7) && !predictable_code_size() &&

@@ -823,7 +823,7 @@ void MacroAssembler::Strd(Register src1, Register src2,

str(src1, dst, cond);

str(src2, dst2, cond);

} else { // PostIndex or NegPostIndex.

- ASSERT((dst.am() == PostIndex) || (dst.am() == NegPostIndex));

+ DCHECK((dst.am() == PostIndex) || (dst.am() == NegPostIndex));

dst2.set_offset(dst2.offset() - 4);

str(src1, MemOperand(dst.rn(), 4, PostIndex), cond);

str(src2, dst2, cond);

@@ -953,7 +953,7 @@ void MacroAssembler::LoadConstantPoolPointerRegister() {

if (FLAG_enable_ool_constant_pool) {

int constant_pool_offset = Code::kConstantPoolOffset - Code::kHeaderSize -

pc_offset() - Instruction::kPCReadOffset;

- ASSERT(ImmediateFitsAddrMode2Instruction(constant_pool_offset));

+ DCHECK(ImmediateFitsAddrMode2Instruction(constant_pool_offset));

ldr(pp, MemOperand(pc, constant_pool_offset));

}

@@ -1037,9 +1037,9 @@ int MacroAssembler::LeaveFrame(StackFrame::Type type) {

void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {

// Set up the frame structure on the stack.

- ASSERT_EQ(2 * kPointerSize, ExitFrameConstants::kCallerSPDisplacement);

- ASSERT_EQ(1 * kPointerSize, ExitFrameConstants::kCallerPCOffset);

- ASSERT_EQ(0 * kPointerSize, ExitFrameConstants::kCallerFPOffset);

+ DCHECK_EQ(2 * kPointerSize, ExitFrameConstants::kCallerSPDisplacement);

+ DCHECK_EQ(1 * kPointerSize, ExitFrameConstants::kCallerPCOffset);

+ DCHECK_EQ(0 * kPointerSize, ExitFrameConstants::kCallerFPOffset);

Push(lr, fp);

mov(fp, Operand(sp)); // Set up new frame pointer.

// Reserve room for saved entry sp and code object.

@@ -1075,7 +1075,7 @@ void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {

const int frame_alignment = MacroAssembler::ActivationFrameAlignment();

sub(sp, sp, Operand((stack_space + 1) * kPointerSize));

if (frame_alignment > 0) {

- ASSERT(IsPowerOf2(frame_alignment));

+ DCHECK(IsPowerOf2(frame_alignment));

and_(sp, sp, Operand(-frame_alignment));

}

@@ -1194,12 +1194,12 @@ void MacroAssembler::InvokePrologue(const ParameterCount& expected,

// The code below is made a lot easier because the calling code already sets

// up actual and expected registers according to the contract if values are

// passed in registers.

- ASSERT(actual.is_immediate() || actual.reg().is(r0));

- ASSERT(expected.is_immediate() || expected.reg().is(r2));

- ASSERT((!code_constant.is_null() && code_reg.is(no_reg)) || code_reg.is(r3));

+ DCHECK(actual.is_immediate() || actual.reg().is(r0));

+ DCHECK(expected.is_immediate() || expected.reg().is(r2));

+ DCHECK((!code_constant.is_null() && code_reg.is(no_reg)) || code_reg.is(r3));

if (expected.is_immediate()) {

- ASSERT(actual.is_immediate());

+ DCHECK(actual.is_immediate());

if (expected.immediate() == actual.immediate()) {

definitely_matches = true;

} else {

@@ -1256,7 +1256,7 @@ void MacroAssembler::InvokeCode(Register code,

InvokeFlag flag,

const CallWrapper& call_wrapper) {

// You can't call a function without a valid frame.

- ASSERT(flag == JUMP_FUNCTION || has_frame());

+ DCHECK(flag == JUMP_FUNCTION || has_frame());

Label done;

bool definitely_mismatches = false;

@@ -1269,7 +1269,7 @@ void MacroAssembler::InvokeCode(Register code,

Call(code);

call_wrapper.AfterCall();

} else {

- ASSERT(flag == JUMP_FUNCTION);

+ DCHECK(flag == JUMP_FUNCTION);

Jump(code);

}

@@ -1285,10 +1285,10 @@ void MacroAssembler::InvokeFunction(Register fun,

InvokeFlag flag,

const CallWrapper& call_wrapper) {

// You can't call a function without a valid frame.

- ASSERT(flag == JUMP_FUNCTION || has_frame());

+ DCHECK(flag == JUMP_FUNCTION || has_frame());

// Contract with called JS functions requires that function is passed in r1.

- ASSERT(fun.is(r1));

+ DCHECK(fun.is(r1));

@@ -1313,10 +1313,10 @@ void MacroAssembler::InvokeFunction(Register function,

InvokeFlag flag,

const CallWrapper& call_wrapper) {

// You can't call a function without a valid frame.

- ASSERT(flag == JUMP_FUNCTION || has_frame());

+ DCHECK(flag == JUMP_FUNCTION || has_frame());

// Contract with called JS functions requires that function is passed in r1.

- ASSERT(function.is(r1));

+ DCHECK(function.is(r1));

// Get the function and setup the context.

ldr(cp, FieldMemOperand(r1, JSFunction::kContextOffset));

@@ -1362,7 +1362,7 @@ void MacroAssembler::IsInstanceJSObjectType(Register map,

void MacroAssembler::IsObjectJSStringType(Register object,

Label* fail) {

- ASSERT(kNotStringTag != 0);

+ DCHECK(kNotStringTag != 0);

ldr(scratch, FieldMemOperand(object, HeapObject::kMapOffset));

ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));

@@ -1385,7 +1385,7 @@ void MacroAssembler::DebugBreak() {

mov(r0, Operand::Zero());

mov(r1, Operand(ExternalReference(Runtime::kDebugBreak, isolate())));

CEntryStub ces(isolate(), 1);

- ASSERT(AllowThisStubCall(&ces));

+ DCHECK(AllowThisStubCall(&ces));

Call(ces.GetCode(), RelocInfo::DEBUG_BREAK);

}

@@ -1533,9 +1533,9 @@ void MacroAssembler::CheckAccessGlobalProxy(Register holder_reg,

Label* miss) {

Label same_contexts;

- ASSERT(!holder_reg.is(scratch));

- ASSERT(!holder_reg.is(ip));

- ASSERT(!scratch.is(ip));

+ DCHECK(!holder_reg.is(scratch));

+ DCHECK(!holder_reg.is(ip));

+ DCHECK(!scratch.is(ip));

// Load current lexical context from the stack frame.

ldr(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));

@@ -1683,7 +1683,7 @@ void MacroAssembler::LoadFromNumberDictionary(Label* miss,

and_(t2, t2, Operand(t1));

// Scale the index by multiplying by the element size.

- ASSERT(SeededNumberDictionary::kEntrySize == 3);

+ DCHECK(SeededNumberDictionary::kEntrySize == 3);

add(t2, t2, Operand(t2, LSL, 1)); // t2 = t2 * 3

// Check if the key is identical to the name.

@@ -1719,7 +1719,7 @@ void MacroAssembler::Allocate(int object_size,

Label* gc_required,

AllocationFlags flags) {

- ASSERT(object_size <= Page::kMaxRegularHeapObjectSize);

+ DCHECK(object_size <= Page::kMaxRegularHeapObjectSize);

if (!FLAG_inline_new) {

if (emit_debug_code()) {

// Trash the registers to simulate an allocation failure.

@@ -1731,17 +1731,17 @@ void MacroAssembler::Allocate(int object_size,

return;

}

- ASSERT(!result.is(scratch1));

- ASSERT(!result.is(scratch2));

- ASSERT(!scratch1.is(scratch2));

- ASSERT(!scratch1.is(ip));

- ASSERT(!scratch2.is(ip));

+ DCHECK(!result.is(scratch1));

+ DCHECK(!result.is(scratch2));

+ DCHECK(!scratch1.is(scratch2));

+ DCHECK(!scratch1.is(ip));

+ DCHECK(!scratch2.is(ip));

// Make object size into bytes.

if ((flags & SIZE_IN_WORDS) != 0) {

object_size *= kPointerSize;

}

- ASSERT_EQ(0, object_size & kObjectAlignmentMask);

+ DCHECK_EQ(0, object_size & kObjectAlignmentMask);

// Check relative positions of allocation top and limit addresses.

// The values must be adjacent in memory to allow the use of LDM.

@@ -1756,8 +1756,8 @@ void MacroAssembler::Allocate(int object_size,

reinterpret_cast<intptr_t>(allocation_top.address());

intptr_t limit =

reinterpret_cast<intptr_t>(allocation_limit.address());

- ASSERT((limit - top) == kPointerSize);

- ASSERT(result.code() < ip.code());

+ DCHECK((limit - top) == kPointerSize);

+ DCHECK(result.code() < ip.code());

// Set up allocation top address register.

@@ -1784,7 +1784,7 @@ void MacroAssembler::Allocate(int object_size,

if ((flags & DOUBLE_ALIGNMENT) != 0) {

// Align the next allocation. Storing the filler map without checking top is

// safe in new-space because the limit of the heap is aligned there.

- ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);

+ DCHECK((flags & PRETENURE_OLD_POINTER_SPACE) == 0);

STATIC_ASSERT(kPointerAlignment * 2 == kDoubleAlignment);

and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);

Label aligned;

@@ -1801,7 +1801,7 @@ void MacroAssembler::Allocate(int object_size,

// Calculate new top and bail out if new space is exhausted. Use result

// to calculate the new top. We must preserve the ip register at this

// point, so we cannot just use add().

- ASSERT(object_size > 0);

+ DCHECK(object_size > 0);

Condition cond = al;

int shift = 0;

@@ -1813,7 +1813,7 @@ void MacroAssembler::Allocate(int object_size,

object_size -= bits;

shift += 8;

Operand bits_operand(bits);

- ASSERT(bits_operand.instructions_required(this) == 1);

+ DCHECK(bits_operand.instructions_required(this) == 1);

add(scratch2, source, bits_operand, SetCC, cond);

source = scratch2;

cond = cc;

@@ -1850,13 +1850,13 @@ void MacroAssembler::Allocate(Register object_size,

// Assert that the register arguments are different and that none of

// them are ip. ip is used explicitly in the code generated below.

- ASSERT(!result.is(scratch1));

- ASSERT(!result.is(scratch2));

- ASSERT(!scratch1.is(scratch2));

- ASSERT(!object_size.is(ip));

- ASSERT(!result.is(ip));

- ASSERT(!scratch1.is(ip));

- ASSERT(!scratch2.is(ip));

+ DCHECK(!result.is(scratch1));

+ DCHECK(!result.is(scratch2));

+ DCHECK(!scratch1.is(scratch2));

+ DCHECK(!object_size.is(ip));

+ DCHECK(!result.is(ip));

+ DCHECK(!scratch1.is(ip));

+ DCHECK(!scratch2.is(ip));

// Check relative positions of allocation top and limit addresses.

// The values must be adjacent in memory to allow the use of LDM.

@@ -1870,8 +1870,8 @@ void MacroAssembler::Allocate(Register object_size,

reinterpret_cast<intptr_t>(allocation_top.address());

intptr_t limit =

reinterpret_cast<intptr_t>(allocation_limit.address());

- ASSERT((limit - top) == kPointerSize);

- ASSERT(result.code() < ip.code());

+ DCHECK((limit - top) == kPointerSize);

+ DCHECK(result.code() < ip.code());

// Set up allocation top address.

@@ -1898,8 +1898,8 @@ void MacroAssembler::Allocate(Register object_size,

if ((flags & DOUBLE_ALIGNMENT) != 0) {

// Align the next allocation. Storing the filler map without checking top is

// safe in new-space because the limit of the heap is aligned there.

- ASSERT((flags & PRETENURE_OLD_POINTER_SPACE) == 0);

- ASSERT(kPointerAlignment * 2 == kDoubleAlignment);

+ DCHECK((flags & PRETENURE_OLD_POINTER_SPACE) == 0);

+ DCHECK(kPointerAlignment * 2 == kDoubleAlignment);

and_(scratch2, result, Operand(kDoubleAlignmentMask), SetCC);

Label aligned;

b(eq, &aligned);

@@ -1966,7 +1966,7 @@ void MacroAssembler::AllocateTwoByteString(Register result,

Label* gc_required) {

// Calculate the number of bytes needed for the characters in the string while

// observing object alignment.

- ASSERT((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);

+ DCHECK((SeqTwoByteString::kHeaderSize & kObjectAlignmentMask) == 0);

mov(scratch1, Operand(length, LSL, 1)); // Length in bytes, not chars.

add(scratch1, scratch1,

Operand(kObjectAlignmentMask + SeqTwoByteString::kHeaderSize));

@@ -1997,8 +1997,8 @@ void MacroAssembler::AllocateAsciiString(Register result,

Label* gc_required) {

// Calculate the number of bytes needed for the characters in the string while

// observing object alignment.

- ASSERT((SeqOneByteString::kHeaderSize & kObjectAlignmentMask) == 0);

- ASSERT(kCharSize == 1);

+ DCHECK((SeqOneByteString::kHeaderSize & kObjectAlignmentMask) == 0);

+ DCHECK(kCharSize == 1);

add(scratch1, length,

Operand(kObjectAlignmentMask + SeqOneByteString::kHeaderSize));

and_(scratch1, scratch1, Operand(~kObjectAlignmentMask));

@@ -2129,7 +2129,7 @@ void MacroAssembler::CompareInstanceType(Register map,

void MacroAssembler::CompareRoot(Register obj,

Heap::RootListIndex index) {

- ASSERT(!obj.is(ip));

+ DCHECK(!obj.is(ip));

LoadRoot(ip, index);

cmp(obj, ip);

}

@@ -2343,7 +2343,7 @@ void MacroAssembler::TryGetFunctionPrototype(Register function,

void MacroAssembler::CallStub(CodeStub* stub,

TypeFeedbackId ast_id,

Condition cond) {

- ASSERT(AllowThisStubCall(stub)); // Stub calls are not allowed in some stubs.

+ DCHECK(AllowThisStubCall(stub)); // Stub calls are not allowed in some stubs.

Call(stub->GetCode(), RelocInfo::CODE_TARGET, ast_id, cond);

}

@@ -2374,7 +2374,7 @@ void MacroAssembler::CallApiFunctionAndReturn(

ExternalReference::handle_scope_level_address(isolate()),

next_address);

- ASSERT(function_address.is(r1) || function_address.is(r2));

+ DCHECK(function_address.is(r1) || function_address.is(r2));

Label profiler_disabled;

Label end_profiler_check;

@@ -2496,7 +2496,7 @@ void MacroAssembler::IndexFromHash(Register hash, Register index) {

// that the constants for the maximum number of digits for an array index

// cached in the hash field and the number of bits reserved for it does not

// conflict.

- ASSERT(TenToThe(String::kMaxCachedArrayIndexLength) <

+ DCHECK(TenToThe(String::kMaxCachedArrayIndexLength) <

(1 << String::kArrayIndexValueBits));

DecodeFieldToSmi<String::ArrayIndexValueBits>(index, hash);

}

@@ -2516,7 +2516,7 @@ void MacroAssembler::SmiToDouble(LowDwVfpRegister value, Register smi) {

void MacroAssembler::TestDoubleIsInt32(DwVfpRegister double_input,

LowDwVfpRegister double_scratch) {

- ASSERT(!double_input.is(double_scratch));

+ DCHECK(!double_input.is(double_scratch));

vcvt_s32_f64(double_scratch.low(), double_input);

vcvt_f64_s32(double_scratch, double_scratch.low());

VFPCompareAndSetFlags(double_input, double_scratch);

@@ -2526,7 +2526,7 @@ void MacroAssembler::TestDoubleIsInt32(DwVfpRegister double_input,

void MacroAssembler::TryDoubleToInt32Exact(Register result,

DwVfpRegister double_input,

LowDwVfpRegister double_scratch) {

- ASSERT(!double_input.is(double_scratch));

+ DCHECK(!double_input.is(double_scratch));

vcvt_s32_f64(double_scratch.low(), double_input);

vmov(result, double_scratch.low());

vcvt_f64_s32(double_scratch, double_scratch.low());

@@ -2540,8 +2540,8 @@ void MacroAssembler::TryInt32Floor(Register result,

LowDwVfpRegister double_scratch,

Label* done,

Label* exact) {

- ASSERT(!result.is(input_high));

- ASSERT(!double_input.is(double_scratch));

+ DCHECK(!result.is(input_high));

+ DCHECK(!double_input.is(double_scratch));

Label negative, exception;

VmovHigh(input_high, double_input);

@@ -2619,7 +2619,7 @@ void MacroAssembler::TruncateHeapNumberToI(Register result,

Label done;

LowDwVfpRegister double_scratch = kScratchDoubleReg;

- ASSERT(!result.is(object));

+ DCHECK(!result.is(object));

vldr(double_scratch,

MemOperand(object, HeapNumber::kValueOffset - kHeapObjectTag));

@@ -2646,7 +2646,7 @@ void MacroAssembler::TruncateNumberToI(Register object,

Label* not_number) {

Label done;

- ASSERT(!result.is(object));

+ DCHECK(!result.is(object));

UntagAndJumpIfSmi(result, object, &done);

JumpIfNotHeapNumber(object, heap_number_map, scratch1, not_number);

@@ -2730,7 +2730,7 @@ void MacroAssembler::TailCallRuntime(Runtime::FunctionId fid,

void MacroAssembler::JumpToExternalReference(const ExternalReference& builtin) {

#if defined(__thumb__)

// Thumb mode builtin.

- ASSERT((reinterpret_cast<intptr_t>(builtin.address()) & 1) == 1);

+ DCHECK((reinterpret_cast<intptr_t>(builtin.address()) & 1) == 1);

#endif

mov(r1, Operand(builtin));

CEntryStub stub(isolate(), 1);

@@ -2742,7 +2742,7 @@ void MacroAssembler::InvokeBuiltin(Builtins::JavaScript id,

InvokeFlag flag,

const CallWrapper& call_wrapper) {

// You can't call a builtin without a valid frame.

- ASSERT(flag == JUMP_FUNCTION || has_frame());

+ DCHECK(flag == JUMP_FUNCTION || has_frame());

GetBuiltinEntry(r2, id);

if (flag == CALL_FUNCTION) {

@@ -2750,7 +2750,7 @@ void MacroAssembler::InvokeBuiltin(Builtins::JavaScript id,

Call(r2);

call_wrapper.AfterCall();

} else {

- ASSERT(flag == JUMP_FUNCTION);

+ DCHECK(flag == JUMP_FUNCTION);

Jump(r2);

}

@@ -2769,7 +2769,7 @@ void MacroAssembler::GetBuiltinFunction(Register target,

void MacroAssembler::GetBuiltinEntry(Register target, Builtins::JavaScript id) {

- ASSERT(!target.is(r1));

+ DCHECK(!target.is(r1));

GetBuiltinFunction(r1, id);

// Load the code entry point from the builtins object.

ldr(target, FieldMemOperand(r1, JSFunction::kCodeEntryOffset));

@@ -2788,7 +2788,7 @@ void MacroAssembler::SetCounter(StatsCounter* counter, int value,

void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,

- ASSERT(value > 0);

+ DCHECK(value > 0);

if (FLAG_native_code_counters && counter->Enabled()) {

mov(scratch2, Operand(ExternalReference(counter)));

ldr(scratch1, MemOperand(scratch2));

@@ -2800,7 +2800,7 @@ void MacroAssembler::IncrementCounter(StatsCounter* counter, int value,

void MacroAssembler::DecrementCounter(StatsCounter* counter, int value,

- ASSERT(value > 0);

+ DCHECK(value > 0);

if (FLAG_native_code_counters && counter->Enabled()) {

mov(scratch2, Operand(ExternalReference(counter)));

ldr(scratch1, MemOperand(scratch2));

@@ -2818,7 +2818,7 @@ void MacroAssembler::Assert(Condition cond, BailoutReason reason) {

void MacroAssembler::AssertFastElements(Register elements) {

if (emit_debug_code()) {

- ASSERT(!elements.is(ip));

+ DCHECK(!elements.is(ip));

Label ok;

push(elements);

ldr(elements, FieldMemOperand(elements, HeapObject::kMapOffset));

@@ -2882,7 +2882,7 @@ void MacroAssembler::Abort(BailoutReason reason) {

// of the Abort macro constant.

static const int kExpectedAbortInstructions = 7;

int abort_instructions = InstructionsGeneratedSince(&abort_start);

- ASSERT(abort_instructions <= kExpectedAbortInstructions);

+ DCHECK(abort_instructions <= kExpectedAbortInstructions);

while (abort_instructions++ < kExpectedAbortInstructions) {

nop();

}

@@ -3489,7 +3489,7 @@ void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,

// and the original value of sp.

mov(scratch, sp);

sub(sp, sp, Operand((stack_passed_arguments + 1) * kPointerSize));

- ASSERT(IsPowerOf2(frame_alignment));

+ DCHECK(IsPowerOf2(frame_alignment));

and_(sp, sp, Operand(-frame_alignment));

str(scratch, MemOperand(sp, stack_passed_arguments * kPointerSize));

} else {

@@ -3505,7 +3505,7 @@ void MacroAssembler::PrepareCallCFunction(int num_reg_arguments,

void MacroAssembler::MovToFloatParameter(DwVfpRegister src) {

- ASSERT(src.is(d0));

+ DCHECK(src.is(d0));

if (!use_eabi_hardfloat()) {

vmov(r0, r1, src);

}

@@ -3520,8 +3520,8 @@ void MacroAssembler::MovToFloatResult(DwVfpRegister src) {

void MacroAssembler::MovToFloatParameters(DwVfpRegister src1,

DwVfpRegister src2) {

- ASSERT(src1.is(d0));

- ASSERT(src2.is(d1));

+ DCHECK(src1.is(d0));

+ DCHECK(src2.is(d1));

if (!use_eabi_hardfloat()) {

vmov(r0, r1, src1);

vmov(r2, r3, src2);

@@ -3559,7 +3559,7 @@ void MacroAssembler::CallCFunction(Register function,

void MacroAssembler::CallCFunctionHelper(Register function,

int num_reg_arguments,

int num_double_arguments) {

- ASSERT(has_frame());

+ DCHECK(has_frame());

// Make sure that the stack is aligned before calling a C function unless

// running in the simulator. The simulator has its own alignment check which

// provides more information.

@@ -3568,7 +3568,7 @@ void MacroAssembler::CallCFunctionHelper(Register function,

int frame_alignment = base::OS::ActivationFrameAlignment();

int frame_alignment_mask = frame_alignment - 1;

if (frame_alignment > kPointerSize) {

- ASSERT(IsPowerOf2(frame_alignment));

+ DCHECK(IsPowerOf2(frame_alignment));

Label alignment_as_expected;

tst(sp, Operand(frame_alignment_mask));

b(eq, &alignment_as_expected);

@@ -3693,7 +3693,7 @@ void MacroAssembler::JumpIfBlack(Register object,

Label* on_black) {

HasColor(object, scratch0, scratch1, on_black, 1, 0); // kBlackBitPattern.

- ASSERT(strcmp(Marking::kBlackBitPattern, "10") == 0);

+ DCHECK(strcmp(Marking::kBlackBitPattern, "10") == 0);

}

@@ -3703,7 +3703,7 @@ void MacroAssembler::HasColor(Register object,

Label* has_color,

int first_bit,

int second_bit) {

- ASSERT(!AreAliased(object, bitmap_scratch, mask_scratch, no_reg));

+ DCHECK(!AreAliased(object, bitmap_scratch, mask_scratch, no_reg));

GetMarkBits(object, bitmap_scratch, mask_scratch);

@@ -3736,8 +3736,8 @@ void MacroAssembler::JumpIfDataObject(Register value,

ldr(scratch, FieldMemOperand(value, HeapObject::kMapOffset));

CompareRoot(scratch, Heap::kHeapNumberMapRootIndex);

b(eq, &is_data_object);

- ASSERT(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);

- ASSERT(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);

+ DCHECK(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);

+ DCHECK(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);

// If it's a string and it's not a cons string then it's an object containing

// no GC pointers.

ldrb(scratch, FieldMemOperand(scratch, Map::kInstanceTypeOffset));

@@ -3750,7 +3750,7 @@ void MacroAssembler::JumpIfDataObject(Register value,

void MacroAssembler::GetMarkBits(Register addr_reg,

- ASSERT(!AreAliased(addr_reg, bitmap_reg, mask_reg, no_reg));

+ DCHECK(!AreAliased(addr_reg, bitmap_reg, mask_reg, no_reg));

and_(bitmap_reg, addr_reg, Operand(~Page::kPageAlignmentMask));

Ubfx(mask_reg, addr_reg, kPointerSizeLog2, Bitmap::kBitsPerCellLog2);

const int kLowBits = kPointerSizeLog2 + Bitmap::kBitsPerCellLog2;

@@ -3767,14 +3767,14 @@ void MacroAssembler::EnsureNotWhite(

Label* value_is_white_and_not_data) {

- ASSERT(!AreAliased(value, bitmap_scratch, mask_scratch, ip));

+ DCHECK(!AreAliased(value, bitmap_scratch, mask_scratch, ip));

GetMarkBits(value, bitmap_scratch, mask_scratch);

// If the value is black or grey we don't need to do anything.

- ASSERT(strcmp(Marking::kWhiteBitPattern, "00") == 0);

- ASSERT(strcmp(Marking::kBlackBitPattern, "10") == 0);

- ASSERT(strcmp(Marking::kGreyBitPattern, "11") == 0);

- ASSERT(strcmp(Marking::kImpossibleBitPattern, "01") == 0);

+ DCHECK(strcmp(Marking::kWhiteBitPattern, "00") == 0);

+ DCHECK(strcmp(Marking::kBlackBitPattern, "10") == 0);

+ DCHECK(strcmp(Marking::kGreyBitPattern, "11") == 0);

+ DCHECK(strcmp(Marking::kImpossibleBitPattern, "01") == 0);

Label done;

@@ -3807,8 +3807,8 @@ void MacroAssembler::EnsureNotWhite(

b(eq, &is_data_object);

// Check for strings.

- ASSERT(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);

- ASSERT(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);

+ DCHECK(kIsIndirectStringTag == 1 && kIsIndirectStringMask == 1);

+ DCHECK(kNotStringTag == 0x80 && kIsNotStringMask == 0x80);

// If it's a string and it's not a cons string then it's an object containing

// no GC pointers.

@@ -3820,8 +3820,8 @@ void MacroAssembler::EnsureNotWhite(

// Otherwise it's String::kHeaderSize + string->length() * (1 or 2).

// External strings are the only ones with the kExternalStringTag bit

// set.

- ASSERT_EQ(0, kSeqStringTag & kExternalStringTag);

- ASSERT_EQ(0, kConsStringTag & kExternalStringTag);

+ DCHECK_EQ(0, kSeqStringTag & kExternalStringTag);

+ DCHECK_EQ(0, kConsStringTag & kExternalStringTag);

tst(instance_type, Operand(kExternalStringTag));

mov(length, Operand(ExternalString::kSize), LeaveCC, ne);

b(ne, &is_data_object);

@@ -3830,8 +3830,8 @@ void MacroAssembler::EnsureNotWhite(

// For ASCII (char-size of 1) we shift the smi tag away to get the length.

// For UC16 (char-size of 2) we just leave the smi tag in place, thereby

// getting the length multiplied by 2.

- ASSERT(kOneByteStringTag == 4 && kStringEncodingMask == 4);

- ASSERT(kSmiTag == 0 && kSmiTagSize == 1);

+ DCHECK(kOneByteStringTag == 4 && kStringEncodingMask == 4);

+ DCHECK(kSmiTag == 0 && kSmiTagSize == 1);

ldr(ip, FieldMemOperand(value, String::kLengthOffset));

tst(instance_type, Operand(kStringEncodingMask));

mov(ip, Operand(ip, LSR, 1), LeaveCC, ne);

@@ -3994,7 +3994,7 @@ void MacroAssembler::JumpIfDictionaryInPrototypeChain(

Label* found) {

- ASSERT(!scratch1.is(scratch0));

+ DCHECK(!scratch1.is(scratch0));

Factory* factory = isolate()->factory();

Label loop_again;

@@ -4054,7 +4054,7 @@ CodePatcher::CodePatcher(byte* address,

// Create a new macro assembler pointing to the address of the code to patch.

// The size is adjusted with kGap on order for the assembler to generate size

// bytes of instructions without failing with buffer size constraints.

- ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);

+ DCHECK(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);

}

@@ -4065,8 +4065,8 @@ CodePatcher::~CodePatcher() {

}

// Check that the code was patched as expected.

- ASSERT(masm_.pc_ == address_ + size_);

- ASSERT(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);

+ DCHECK(masm_.pc_ == address_ + size_);

+ DCHECK(masm_.reloc_info_writer.pos() == address_ + size_ + Assembler::kGap);

}

@@ -4090,9 +4090,9 @@ void CodePatcher::EmitCondition(Condition cond) {

void MacroAssembler::TruncatingDiv(Register result,

int32_t divisor) {

- ASSERT(!dividend.is(result));

- ASSERT(!dividend.is(ip));

- ASSERT(!result.is(ip));

+ DCHECK(!dividend.is(result));

+ DCHECK(!dividend.is(ip));

+ DCHECK(!result.is(ip));

MultiplierAndShift ms(divisor);

mov(ip, Operand(ms.multiplier()));

smull(ip, result, dividend, ip);

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