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Unified Diff: src/compiler/arm64/instruction-selector-arm64.cc

Issue 430503007: Rename ASSERT* to DCHECK*. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE and fixes Created 6 years, 4 months ago
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Index: src/compiler/arm64/instruction-selector-arm64.cc
diff --git a/src/compiler/arm64/instruction-selector-arm64.cc b/src/compiler/arm64/instruction-selector-arm64.cc
index 52d4bfa6ae4e61fce326979ab25791a305d15e28..95dc53c3441e51ff60ab9c9467828a9b8958339d 100644
--- a/src/compiler/arm64/instruction-selector-arm64.cc
+++ b/src/compiler/arm64/instruction-selector-arm64.cc
@@ -132,10 +132,10 @@ static void VisitBinop(InstructionSelector* selector, Node* node,
outputs[output_count++] = g.DefineAsRegister(cont->result());
}
- ASSERT_NE(0, input_count);
- ASSERT_NE(0, output_count);
- ASSERT_GE(ARRAY_SIZE(inputs), input_count);
- ASSERT_GE(ARRAY_SIZE(outputs), output_count);
+ DCHECK_NE(0, input_count);
+ DCHECK_NE(0, output_count);
+ DCHECK_GE(ARRAY_SIZE(inputs), input_count);
+ DCHECK_GE(ARRAY_SIZE(outputs), output_count);
Instruction* instr = selector->Emit(cont->Encode(opcode), output_count,
outputs, input_count, inputs);
@@ -205,7 +205,7 @@ void InstructionSelector::VisitStore(Node* node) {
StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node);
MachineRepresentation rep = store_rep.rep;
if (store_rep.write_barrier_kind == kFullWriteBarrier) {
- ASSERT(rep == kMachineTagged);
+ DCHECK(rep == kMachineTagged);
// TODO(dcarney): refactor RecordWrite function to take temp registers
// and pass them here instead of using fixed regs
// TODO(dcarney): handle immediate indices.
@@ -215,7 +215,7 @@ void InstructionSelector::VisitStore(Node* node) {
temps);
return;
}
- ASSERT_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
+ DCHECK_EQ(kNoWriteBarrier, store_rep.write_barrier_kind);
InstructionOperand* val;
if (rep == kMachineFloat64) {
val = g.UseDoubleRegister(value);
@@ -503,7 +503,7 @@ static void VisitCompare(InstructionSelector* selector, InstructionCode opcode,
selector->Emit(opcode, NULL, left, right, g.Label(cont->true_block()),
g.Label(cont->false_block()))->MarkAsControl();
} else {
- ASSERT(cont->IsSet());
+ DCHECK(cont->IsSet());
selector->Emit(opcode, g.DefineAsRegister(cont->result()), left, right);
}
}
@@ -653,13 +653,13 @@ void InstructionSelector::VisitCall(Node* call, BasicBlock* continuation,
call_instr->MarkAsCall();
if (deoptimization != NULL) {
- ASSERT(continuation != NULL);
+ DCHECK(continuation != NULL);
call_instr->MarkAsControl();
}
// Caller clean up of stack for C-style calls.
if (is_c_frame && aligned_push_count > 0) {
- ASSERT(deoptimization == NULL && continuation == NULL);
+ DCHECK(deoptimization == NULL && continuation == NULL);
Emit(kArm64Drop | MiscField::encode(aligned_push_count), NULL);
}
}
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