Rename ASSERT* to DCHECK*.

test/cctest/test-utils-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 77 matching lines @@
     printf("Expected %.17f (0x%016" PRIx64 ")\t "
            "Found %.17f (0x%016" PRIx64 ")\n",
            expected, double_to_rawbits(expected),
            result, double_to_rawbits(result));
   }
   return false;
 }
 
 
 bool Equal32(uint32_t expected, const RegisterDump* core, const Register& reg) {
-  ASSERT(reg.Is32Bits());
+  DCHECK(reg.Is32Bits());
   // Retrieve the corresponding X register so we can check that the upper part
   // was properly cleared.
   int64_t result_x = core->xreg(reg.code());
   if ((result_x & 0xffffffff00000000L) != 0) {
     printf("Expected 0x%08" PRIx32 "\t Found 0x%016" PRIx64 "\n",
            expected, result_x);
     return false;
   }
   uint32_t result_w = core->wreg(reg.code());
   return Equal32(expected, core, result_w);
 }
 
 
 bool Equal64(uint64_t expected,
              const RegisterDump* core,
              const Register& reg) {
-  ASSERT(reg.Is64Bits());
+  DCHECK(reg.Is64Bits());
   uint64_t result = core->xreg(reg.code());
   return Equal64(expected, core, result);
 }
 
 
 bool EqualFP32(float expected,
                const RegisterDump* core,
                const FPRegister& fpreg) {
-  ASSERT(fpreg.Is32Bits());
+  DCHECK(fpreg.Is32Bits());
   // Retrieve the corresponding D register so we can check that the upper part
   // was properly cleared.
   uint64_t result_64 = core->dreg_bits(fpreg.code());
   if ((result_64 & 0xffffffff00000000L) != 0) {
     printf("Expected 0x%08" PRIx32 " (%f)\t Found 0x%016" PRIx64 "\n",
            float_to_rawbits(expected), expected, result_64);
     return false;
   }
 
   return EqualFP32(expected, core, core->sreg(fpreg.code()));
 }
 
 
 bool EqualFP64(double expected,
                const RegisterDump* core,
                const FPRegister& fpreg) {
-  ASSERT(fpreg.Is64Bits());
+  DCHECK(fpreg.Is64Bits());
   return EqualFP64(expected, core, core->dreg(fpreg.code()));
 }
 
 
 bool Equal64(const Register& reg0,
              const RegisterDump* core,
              const Register& reg1) {
-  ASSERT(reg0.Is64Bits() && reg1.Is64Bits());
+  DCHECK(reg0.Is64Bits() && reg1.Is64Bits());
   int64_t expected = core->xreg(reg0.code());
   int64_t result = core->xreg(reg1.code());
   return Equal64(expected, core, result);
 }
 
 
 static char FlagN(uint32_t flags) {
   return (flags & NFlag) ? 'N' : 'n';
 }
 
 
 static char FlagZ(uint32_t flags) {
   return (flags & ZFlag) ? 'Z' : 'z';
 }
 
 
 static char FlagC(uint32_t flags) {
   return (flags & CFlag) ? 'C' : 'c';
 }
 
 
 static char FlagV(uint32_t flags) {
   return (flags & VFlag) ? 'V' : 'v';
 }
 
 
 bool EqualNzcv(uint32_t expected, uint32_t result) {
-  ASSERT((expected & ~NZCVFlag) == 0);
-  ASSERT((result & ~NZCVFlag) == 0);
+  DCHECK((expected & ~NZCVFlag) == 0);
+  DCHECK((result & ~NZCVFlag) == 0);
   if (result != expected) {
     printf("Expected: %c%c%c%c\t Found: %c%c%c%c\n",
         FlagN(expected), FlagZ(expected), FlagC(expected), FlagV(expected),
         FlagN(result), FlagZ(result), FlagC(result), FlagV(result));
     return false;
   }
 
   return true;
 }
 
@@ skipping 35 matching lines @@
         x[i] = Register::Create(n, kXRegSizeInBits);
       }
       if (w) {
         w[i] = Register::Create(n, kWRegSizeInBits);
       }
       list |= (1UL << n);
       i++;
     }
   }
   // Check that we got enough registers.
-  ASSERT(CountSetBits(list, kNumberOfRegisters) == reg_count);
+  DCHECK(CountSetBits(list, kNumberOfRegisters) == reg_count);
 
   return list;
 }
 
 
 RegList PopulateFPRegisterArray(FPRegister* s, FPRegister* d, FPRegister* v,
                                 int reg_size, int reg_count, RegList allowed) {
   RegList list = 0;
   int i = 0;
   for (unsigned n = 0; (n < kNumberOfFPRegisters) && (i < reg_count); n++) {
     if (((1UL << n) & allowed) != 0) {
       // Only assigned allowed registers.
       if (v) {
         v[i] = FPRegister::Create(n, reg_size);
       }
       if (d) {
         d[i] = FPRegister::Create(n, kDRegSizeInBits);
       }
       if (s) {
         s[i] = FPRegister::Create(n, kSRegSizeInBits);
       }
       list |= (1UL << n);
       i++;
     }
   }
   // Check that we got enough registers.
-  ASSERT(CountSetBits(list, kNumberOfFPRegisters) == reg_count);
+  DCHECK(CountSetBits(list, kNumberOfFPRegisters) == reg_count);
 
   return list;
 }
 
 
 void Clobber(MacroAssembler* masm, RegList reg_list, uint64_t const value) {
   Register first = NoReg;
   for (unsigned i = 0; i < kNumberOfRegisters; i++) {
     if (reg_list & (1UL << i)) {
       Register xn = Register::Create(i, kXRegSizeInBits);
       // We should never write into csp here.
-      ASSERT(!xn.Is(csp));
+      DCHECK(!xn.Is(csp));
       if (!xn.IsZero()) {
         if (!first.IsValid()) {
           // This is the first register we've hit, so construct the literal.
           __ Mov(xn, value);
           first = xn;
         } else {
           // We've already loaded the literal, so re-use the value already
           // loaded into the first register we hit.
           __ Mov(xn, first);
         }
@@ skipping 29 matching lines @@
   } else if (reg_list.type() == CPURegister::kFPRegister) {
     // This will always clobber D registers.
     ClobberFP(masm, reg_list.list());
   } else {
     UNREACHABLE();
   }
 }
 
 
 void RegisterDump::Dump(MacroAssembler* masm) {
-  ASSERT(__ StackPointer().Is(csp));
+  DCHECK(__ StackPointer().Is(csp));
 
   // Ensure that we don't unintentionally clobber any registers.
   RegList old_tmp_list = masm->TmpList()->list();
   RegList old_fptmp_list = masm->FPTmpList()->list();
   masm->TmpList()->set_list(0);
   masm->FPTmpList()->set_list(0);
 
   // Preserve some temporary registers.
   Register dump_base = x0;
   Register dump = x1;
@@ skipping 55 matching lines @@
 
   // Dump the flags.
   __ Mrs(tmp, NZCV);
   __ Str(tmp, MemOperand(dump_base, flags_offset));
 
   // To dump the values that were in tmp amd dump, we need a new scratch
   // register.  We can use any of the already dumped registers since we can
   // easily restore them.
   Register dump2_base = x10;
   Register dump2 = x11;
-  ASSERT(!AreAliased(dump_base, dump, tmp, dump2_base, dump2));
+  DCHECK(!AreAliased(dump_base, dump, tmp, dump2_base, dump2));
 
   // Don't lose the dump_ address.
   __ Mov(dump2_base, dump_base);
 
   __ Pop(tmp, dump, dump_base, xzr);
 
   __ Add(dump2, dump2_base, w_offset);
   __ Str(dump_base_w, MemOperand(dump2, dump_base.code() * kWRegSize));
   __ Str(dump_w, MemOperand(dump2, dump.code() * kWRegSize));
   __ Str(tmp_w, MemOperand(dump2, tmp.code() * kWRegSize));
 
   __ Add(dump2, dump2_base, x_offset);
   __ Str(dump_base, MemOperand(dump2, dump_base.code() * kXRegSize));
   __ Str(dump, MemOperand(dump2, dump.code() * kXRegSize));
   __ Str(tmp, MemOperand(dump2, tmp.code() * kXRegSize));
 
   // Finally, restore dump2_base and dump2.
   __ Ldr(dump2_base, MemOperand(dump2, dump2_base.code() * kXRegSize));
   __ Ldr(dump2, MemOperand(dump2, dump2.code() * kXRegSize));
 
   // Restore the MacroAssembler's scratch registers.
   masm->TmpList()->set_list(old_tmp_list);
   masm->FPTmpList()->set_list(old_fptmp_list);
 
   completed_ = true;
 }