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Side by Side Diff: src/x87/code-stubs-x87.h

Issue 430503007: Rename ASSERT* to DCHECK*. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE and fixes Created 6 years, 4 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_X87_CODE_STUBS_X87_H_ 5 #ifndef V8_X87_CODE_STUBS_X87_H_
6 #define V8_X87_CODE_STUBS_X87_H_ 6 #define V8_X87_CODE_STUBS_X87_H_
7 7
8 #include "src/ic-inl.h" 8 #include "src/ic-inl.h"
9 #include "src/macro-assembler.h" 9 #include "src/macro-assembler.h"
10 10
(...skipping 196 matching lines...) Expand 10 before | Expand all | Expand 10 after
207 static const byte kFiveByteJumpInstruction = 0xe9; // Jmp #imm32. 207 static const byte kFiveByteJumpInstruction = 0xe9; // Jmp #imm32.
208 208
209 static Mode GetMode(Code* stub) { 209 static Mode GetMode(Code* stub) {
210 byte first_instruction = stub->instruction_start()[0]; 210 byte first_instruction = stub->instruction_start()[0];
211 byte second_instruction = stub->instruction_start()[2]; 211 byte second_instruction = stub->instruction_start()[2];
212 212
213 if (first_instruction == kTwoByteJumpInstruction) { 213 if (first_instruction == kTwoByteJumpInstruction) {
214 return INCREMENTAL; 214 return INCREMENTAL;
215 } 215 }
216 216
217 ASSERT(first_instruction == kTwoByteNopInstruction); 217 DCHECK(first_instruction == kTwoByteNopInstruction);
218 218
219 if (second_instruction == kFiveByteJumpInstruction) { 219 if (second_instruction == kFiveByteJumpInstruction) {
220 return INCREMENTAL_COMPACTION; 220 return INCREMENTAL_COMPACTION;
221 } 221 }
222 222
223 ASSERT(second_instruction == kFiveByteNopInstruction); 223 DCHECK(second_instruction == kFiveByteNopInstruction);
224 224
225 return STORE_BUFFER_ONLY; 225 return STORE_BUFFER_ONLY;
226 } 226 }
227 227
228 static void Patch(Code* stub, Mode mode) { 228 static void Patch(Code* stub, Mode mode) {
229 switch (mode) { 229 switch (mode) {
230 case STORE_BUFFER_ONLY: 230 case STORE_BUFFER_ONLY:
231 ASSERT(GetMode(stub) == INCREMENTAL || 231 DCHECK(GetMode(stub) == INCREMENTAL ||
232 GetMode(stub) == INCREMENTAL_COMPACTION); 232 GetMode(stub) == INCREMENTAL_COMPACTION);
233 stub->instruction_start()[0] = kTwoByteNopInstruction; 233 stub->instruction_start()[0] = kTwoByteNopInstruction;
234 stub->instruction_start()[2] = kFiveByteNopInstruction; 234 stub->instruction_start()[2] = kFiveByteNopInstruction;
235 break; 235 break;
236 case INCREMENTAL: 236 case INCREMENTAL:
237 ASSERT(GetMode(stub) == STORE_BUFFER_ONLY); 237 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
238 stub->instruction_start()[0] = kTwoByteJumpInstruction; 238 stub->instruction_start()[0] = kTwoByteJumpInstruction;
239 break; 239 break;
240 case INCREMENTAL_COMPACTION: 240 case INCREMENTAL_COMPACTION:
241 ASSERT(GetMode(stub) == STORE_BUFFER_ONLY); 241 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
242 stub->instruction_start()[0] = kTwoByteNopInstruction; 242 stub->instruction_start()[0] = kTwoByteNopInstruction;
243 stub->instruction_start()[2] = kFiveByteJumpInstruction; 243 stub->instruction_start()[2] = kFiveByteJumpInstruction;
244 break; 244 break;
245 } 245 }
246 ASSERT(GetMode(stub) == mode); 246 DCHECK(GetMode(stub) == mode);
247 CpuFeatures::FlushICache(stub->instruction_start(), 7); 247 CpuFeatures::FlushICache(stub->instruction_start(), 7);
248 } 248 }
249 249
250 private: 250 private:
251 // This is a helper class for freeing up 3 scratch registers, where the third 251 // This is a helper class for freeing up 3 scratch registers, where the third
252 // is always ecx (needed for shift operations). The input is two registers 252 // is always ecx (needed for shift operations). The input is two registers
253 // that must be preserved and one scratch register provided by the caller. 253 // that must be preserved and one scratch register provided by the caller.
254 class RegisterAllocation { 254 class RegisterAllocation {
255 public: 255 public:
256 RegisterAllocation(Register object, 256 RegisterAllocation(Register object,
257 Register address, 257 Register address,
258 Register scratch0) 258 Register scratch0)
259 : object_orig_(object), 259 : object_orig_(object),
260 address_orig_(address), 260 address_orig_(address),
261 scratch0_orig_(scratch0), 261 scratch0_orig_(scratch0),
262 object_(object), 262 object_(object),
263 address_(address), 263 address_(address),
264 scratch0_(scratch0) { 264 scratch0_(scratch0) {
265 ASSERT(!AreAliased(scratch0, object, address, no_reg)); 265 DCHECK(!AreAliased(scratch0, object, address, no_reg));
266 scratch1_ = GetRegThatIsNotEcxOr(object_, address_, scratch0_); 266 scratch1_ = GetRegThatIsNotEcxOr(object_, address_, scratch0_);
267 if (scratch0.is(ecx)) { 267 if (scratch0.is(ecx)) {
268 scratch0_ = GetRegThatIsNotEcxOr(object_, address_, scratch1_); 268 scratch0_ = GetRegThatIsNotEcxOr(object_, address_, scratch1_);
269 } 269 }
270 if (object.is(ecx)) { 270 if (object.is(ecx)) {
271 object_ = GetRegThatIsNotEcxOr(address_, scratch0_, scratch1_); 271 object_ = GetRegThatIsNotEcxOr(address_, scratch0_, scratch1_);
272 } 272 }
273 if (address.is(ecx)) { 273 if (address.is(ecx)) {
274 address_ = GetRegThatIsNotEcxOr(object_, scratch0_, scratch1_); 274 address_ = GetRegThatIsNotEcxOr(object_, scratch0_, scratch1_);
275 } 275 }
276 ASSERT(!AreAliased(scratch0_, object_, address_, ecx)); 276 DCHECK(!AreAliased(scratch0_, object_, address_, ecx));
277 } 277 }
278 278
279 void Save(MacroAssembler* masm) { 279 void Save(MacroAssembler* masm) {
280 ASSERT(!address_orig_.is(object_)); 280 DCHECK(!address_orig_.is(object_));
281 ASSERT(object_.is(object_orig_) || address_.is(address_orig_)); 281 DCHECK(object_.is(object_orig_) || address_.is(address_orig_));
282 ASSERT(!AreAliased(object_, address_, scratch1_, scratch0_)); 282 DCHECK(!AreAliased(object_, address_, scratch1_, scratch0_));
283 ASSERT(!AreAliased(object_orig_, address_, scratch1_, scratch0_)); 283 DCHECK(!AreAliased(object_orig_, address_, scratch1_, scratch0_));
284 ASSERT(!AreAliased(object_, address_orig_, scratch1_, scratch0_)); 284 DCHECK(!AreAliased(object_, address_orig_, scratch1_, scratch0_));
285 // We don't have to save scratch0_orig_ because it was given to us as 285 // We don't have to save scratch0_orig_ because it was given to us as
286 // a scratch register. But if we had to switch to a different reg then 286 // a scratch register. But if we had to switch to a different reg then
287 // we should save the new scratch0_. 287 // we should save the new scratch0_.
288 if (!scratch0_.is(scratch0_orig_)) masm->push(scratch0_); 288 if (!scratch0_.is(scratch0_orig_)) masm->push(scratch0_);
289 if (!ecx.is(scratch0_orig_) && 289 if (!ecx.is(scratch0_orig_) &&
290 !ecx.is(object_orig_) && 290 !ecx.is(object_orig_) &&
291 !ecx.is(address_orig_)) { 291 !ecx.is(address_orig_)) {
292 masm->push(ecx); 292 masm->push(ecx);
293 } 293 }
294 masm->push(scratch1_); 294 masm->push(scratch1_);
(...skipping 109 matching lines...) Expand 10 before | Expand all | Expand 10 after
404 Register value_; 404 Register value_;
405 Register address_; 405 Register address_;
406 RememberedSetAction remembered_set_action_; 406 RememberedSetAction remembered_set_action_;
407 RegisterAllocation regs_; 407 RegisterAllocation regs_;
408 }; 408 };
409 409
410 410
411 } } // namespace v8::internal 411 } } // namespace v8::internal
412 412
413 #endif // V8_X87_CODE_STUBS_X87_H_ 413 #endif // V8_X87_CODE_STUBS_X87_H_
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