Rename ASSERT* to DCHECK*.

src/x64/ic-x64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_X64
 
 #include "src/codegen.h"
 #include "src/ic-inl.h"
@@ skipping 162 matching lines @@
   // Scratch registers:
   //   map - used to hold the map of the receiver.
 
   // Check that the object isn't a smi.
   __ JumpIfSmi(receiver, slow);
 
   // Check that the object is some kind of JS object EXCEPT JS Value type.
   // In the case that the object is a value-wrapper object,
   // we enter the runtime system to make sure that indexing
   // into string objects work as intended.
-  ASSERT(JS_OBJECT_TYPE > JS_VALUE_TYPE);
+  DCHECK(JS_OBJECT_TYPE > JS_VALUE_TYPE);
   __ CmpObjectType(receiver, JS_OBJECT_TYPE, map);
   __ j(below, slow);
 
   // Check bit field.
   __ testb(FieldOperand(map, Map::kBitFieldOffset),
            Immediate((1 << Map::kIsAccessCheckNeeded) |
                      (1 << interceptor_bit)));
   __ j(not_zero, slow);
 }
 
@@ skipping 92 matching lines @@
 
 
 
 void KeyedLoadIC::GenerateGeneric(MacroAssembler* masm) {
   // The return address is on the stack.
   Label slow, check_name, index_smi, index_name, property_array_property;
   Label probe_dictionary, check_number_dictionary;
 
   Register receiver = ReceiverRegister();
   Register key = NameRegister();
-  ASSERT(receiver.is(rdx));
-  ASSERT(key.is(rcx));
+  DCHECK(receiver.is(rdx));
+  DCHECK(key.is(rcx));
 
   // Check that the key is a smi.
   __ JumpIfNotSmi(key, &check_name);
   __ bind(&index_smi);
   // Now the key is known to be a smi. This place is also jumped to from below
   // where a numeric string is converted to a smi.
 
   GenerateKeyedLoadReceiverCheck(
       masm, receiver, rax, Map::kHasIndexedInterceptor, &slow);
 
@@ skipping 137 matching lines @@
 
 
 void KeyedLoadIC::GenerateString(MacroAssembler* masm) {
   // Return address is on the stack.
   Label miss;
 
   Register receiver = ReceiverRegister();
   Register index = NameRegister();
   Register scratch = rbx;
   Register result = rax;
-  ASSERT(!scratch.is(receiver) && !scratch.is(index));
+  DCHECK(!scratch.is(receiver) && !scratch.is(index));
 
   StringCharAtGenerator char_at_generator(receiver,
                                           index,
                                           scratch,
                                           result,
                                           &miss,  // When not a string.
                                           &miss,  // When not a number.
                                           &miss,  // When index out of range.
                                           STRING_INDEX_IS_ARRAY_INDEX);
   char_at_generator.GenerateFast(masm);
   __ ret(0);
 
   StubRuntimeCallHelper call_helper;
   char_at_generator.GenerateSlow(masm, call_helper);
 
   __ bind(&miss);
   GenerateMiss(masm);
 }
 
 
 void KeyedLoadIC::GenerateIndexedInterceptor(MacroAssembler* masm) {
   // Return address is on the stack.
   Label slow;
 
   Register receiver = ReceiverRegister();
   Register key = NameRegister();
   Register scratch = rax;
-  ASSERT(!scratch.is(receiver) && !scratch.is(key));
+  DCHECK(!scratch.is(receiver) && !scratch.is(key));
 
   // Check that the receiver isn't a smi.
   __ JumpIfSmi(receiver, &slow);
 
   // Check that the key is an array index, that is Uint32.
   STATIC_ASSERT(kSmiValueSize <= 32);
   __ JumpUnlessNonNegativeSmi(key, &slow);
 
   // Get the map of the receiver.
   __ movp(scratch, FieldOperand(receiver, HeapObject::kMapOffset));
@@ skipping 28 matching lines @@
     Label* fast_double,
     Label* slow,
     KeyedStoreCheckMap check_map,
     KeyedStoreIncrementLength increment_length) {
   Label transition_smi_elements;
   Label finish_object_store, non_double_value, transition_double_elements;
   Label fast_double_without_map_check;
   Register receiver = KeyedStoreIC::ReceiverRegister();
   Register key = KeyedStoreIC::NameRegister();
   Register value = KeyedStoreIC::ValueRegister();
-  ASSERT(receiver.is(rdx));
-  ASSERT(key.is(rcx));
-  ASSERT(value.is(rax));
+  DCHECK(receiver.is(rdx));
+  DCHECK(key.is(rcx));
+  DCHECK(value.is(rax));
   // Fast case: Do the store, could be either Object or double.
   __ bind(fast_object);
   // rbx: receiver's elements array (a FixedArray)
   // receiver is a JSArray.
   // r9: map of receiver
   if (check_map == kCheckMap) {
     __ movp(rdi, FieldOperand(rbx, HeapObject::kMapOffset));
     __ CompareRoot(rdi, Heap::kFixedArrayMapRootIndex);
     __ j(not_equal, fast_double);
   }
@@ skipping 124 matching lines @@
 
 
 void KeyedStoreIC::GenerateGeneric(MacroAssembler* masm,
                                    StrictMode strict_mode) {
   // Return address is on the stack.
   Label slow, slow_with_tagged_index, fast_object, fast_object_grow;
   Label fast_double, fast_double_grow;
   Label array, extra, check_if_double_array;
   Register receiver = ReceiverRegister();
   Register key = NameRegister();
-  ASSERT(receiver.is(rdx));
-  ASSERT(key.is(rcx));
+  DCHECK(receiver.is(rdx));
+  DCHECK(key.is(rcx));
 
   // Check that the object isn't a smi.
   __ JumpIfSmi(receiver, &slow_with_tagged_index);
   // Get the map from the receiver.
   __ movp(r9, FieldOperand(receiver, HeapObject::kMapOffset));
   // Check that the receiver does not require access checks and is not observed.
   // The generic stub does not perform map checks or handle observed objects.
   __ testb(FieldOperand(r9, Map::kBitFieldOffset),
            Immediate(1 << Map::kIsAccessCheckNeeded | 1 << Map::kIsObserved));
   __ j(not_zero, &slow_with_tagged_index);
@@ skipping 140 matching lines @@
                       scratch,
                       times_pointer_size,
                       FixedArray::kHeaderSize);
 }
 
 
 void KeyedLoadIC::GenerateSloppyArguments(MacroAssembler* masm) {
   // The return address is on the stack.
   Register receiver = ReceiverRegister();
   Register key = NameRegister();
-  ASSERT(receiver.is(rdx));
-  ASSERT(key.is(rcx));
+  DCHECK(receiver.is(rdx));
+  DCHECK(key.is(rcx));
 
   Label slow, notin;
   Operand mapped_location =
       GenerateMappedArgumentsLookup(
           masm, receiver, key, rbx, rax, rdi, &notin, &slow);
   __ movp(rax, mapped_location);
   __ Ret();
   __ bind(&notin);
   // The unmapped lookup expects that the parameter map is in rbx.
   Operand unmapped_location =
       GenerateUnmappedArgumentsLookup(masm, key, rbx, rax, &slow);
   __ CompareRoot(unmapped_location, Heap::kTheHoleValueRootIndex);
   __ j(equal, &slow);
   __ movp(rax, unmapped_location);
   __ Ret();
   __ bind(&slow);
   GenerateMiss(masm);
 }
 
 
 void KeyedStoreIC::GenerateSloppyArguments(MacroAssembler* masm) {
   // The return address is on the stack.
   Label slow, notin;
   Register receiver = ReceiverRegister();
   Register name = NameRegister();
   Register value = ValueRegister();
-  ASSERT(receiver.is(rdx));
-  ASSERT(name.is(rcx));
-  ASSERT(value.is(rax));
+  DCHECK(receiver.is(rdx));
+  DCHECK(name.is(rcx));
+  DCHECK(value.is(rax));
 
   Operand mapped_location = GenerateMappedArgumentsLookup(
       masm, receiver, name, rbx, rdi, r8, &notin, &slow);
   __ movp(mapped_location, value);
   __ leap(r9, mapped_location);
   __ movp(r8, value);
   __ RecordWrite(rbx,
                  r9,
                  r8,
                  kDontSaveFPRegs,
@@ skipping 16 matching lines @@
   __ Ret();
   __ bind(&slow);
   GenerateMiss(masm);
 }
 
 
 void LoadIC::GenerateMegamorphic(MacroAssembler* masm) {
   // The return address is on the stack.
   Register receiver = ReceiverRegister();
   Register name = NameRegister();
-  ASSERT(receiver.is(rdx));
-  ASSERT(name.is(rcx));
+  DCHECK(receiver.is(rdx));
+  DCHECK(name.is(rcx));
 
   // Probe the stub cache.
   Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
       Code::ComputeHandlerFlags(Code::LOAD_IC));
   masm->isolate()->stub_cache()->GenerateProbe(
       masm, flags, receiver, name, rbx, rax);
 
   GenerateMiss(masm);
 }
 
 
 void LoadIC::GenerateNormal(MacroAssembler* masm) {
   Register dictionary = rax;
-  ASSERT(!dictionary.is(ReceiverRegister()));
-  ASSERT(!dictionary.is(NameRegister()));
+  DCHECK(!dictionary.is(ReceiverRegister()));
+  DCHECK(!dictionary.is(NameRegister()));
 
   Label slow;
 
   __ movp(dictionary,
           FieldOperand(ReceiverRegister(), JSObject::kPropertiesOffset));
   GenerateDictionaryLoad(masm, &slow, dictionary, NameRegister(), rbx, rdi,
                          rax);
   __ ret(0);
 
   // Dictionary load failed, go slow (but don't miss).
@@ skipping 58 matching lines @@
   __ TailCallExternalReference(ref, 2, 1);
 }
 
 
 // IC register specifications
 const Register LoadIC::ReceiverRegister() { return rdx; }
 const Register LoadIC::NameRegister() { return rcx; }
 
 
 const Register LoadIC::SlotRegister() {
-  ASSERT(FLAG_vector_ics);
+  DCHECK(FLAG_vector_ics);
   return rax;
 }
 
 
 const Register LoadIC::VectorRegister() {
-  ASSERT(FLAG_vector_ics);
+  DCHECK(FLAG_vector_ics);
   return rbx;
 }
 
 
 const Register StoreIC::ReceiverRegister() { return rdx; }
 const Register StoreIC::NameRegister() { return rcx; }
 const Register StoreIC::ValueRegister() { return rax; }
 
 
 const Register KeyedStoreIC::MapRegister() {
@@ skipping 26 matching lines @@
   // Cache miss: Jump to runtime.
   GenerateMiss(masm);
 }
 
 
 static void StoreIC_PushArgs(MacroAssembler* masm) {
   Register receiver = StoreIC::ReceiverRegister();
   Register name = StoreIC::NameRegister();
   Register value = StoreIC::ValueRegister();
 
-  ASSERT(!rbx.is(receiver) && !rbx.is(name) && !rbx.is(value));
+  DCHECK(!rbx.is(receiver) && !rbx.is(name) && !rbx.is(value));
 
   __ PopReturnAddressTo(rbx);
   __ Push(receiver);
   __ Push(name);
   __ Push(value);
   __ PushReturnAddressFrom(rbx);
 }
 
 
 void StoreIC::GenerateMiss(MacroAssembler* masm) {
@@ skipping 23 matching lines @@
 
   __ bind(&miss);
   __ IncrementCounter(counters->store_normal_miss(), 1);
   GenerateMiss(masm);
 }
 
 
 void StoreIC::GenerateRuntimeSetProperty(MacroAssembler* masm,
                                          StrictMode strict_mode) {
   // Return address is on the stack.
-  ASSERT(!rbx.is(ReceiverRegister()) && !rbx.is(NameRegister()) &&
+  DCHECK(!rbx.is(ReceiverRegister()) && !rbx.is(NameRegister()) &&
          !rbx.is(ValueRegister()));
 
   __ PopReturnAddressTo(rbx);
   __ Push(ReceiverRegister());
   __ Push(NameRegister());
   __ Push(ValueRegister());
   __ Push(Smi::FromInt(strict_mode));
   __ PushReturnAddressFrom(rbx);
 
   // Do tail-call to runtime routine.
   __ TailCallRuntime(Runtime::kSetProperty, 4, 1);
 }
 
 
 void KeyedStoreIC::GenerateRuntimeSetProperty(MacroAssembler* masm,
                                               StrictMode strict_mode) {
   // Return address is on the stack.
-  ASSERT(!rbx.is(ReceiverRegister()) && !rbx.is(NameRegister()) &&
+  DCHECK(!rbx.is(ReceiverRegister()) && !rbx.is(NameRegister()) &&
          !rbx.is(ValueRegister()));
 
   __ PopReturnAddressTo(rbx);
   __ Push(ReceiverRegister());
   __ Push(NameRegister());
   __ Push(ValueRegister());
   __ Push(Smi::FromInt(strict_mode));   // Strict mode.
   __ PushReturnAddressFrom(rbx);
 
   // Do tail-call to runtime routine.
@@ skipping 67 matching lines @@
 
 
 void PatchInlinedSmiCode(Address address, InlinedSmiCheck check) {
   // The address of the instruction following the call.
   Address test_instruction_address =
       address + Assembler::kCallTargetAddressOffset;
 
   // If the instruction following the call is not a test al, nothing
   // was inlined.
   if (*test_instruction_address != Assembler::kTestAlByte) {
-    ASSERT(*test_instruction_address == Assembler::kNopByte);
+    DCHECK(*test_instruction_address == Assembler::kNopByte);
     return;
   }
 
   Address delta_address = test_instruction_address + 1;
   // The delta to the start of the map check instruction and the
   // condition code uses at the patched jump.
   uint8_t delta = *reinterpret_cast<uint8_t*>(delta_address);
   if (FLAG_trace_ic) {
     PrintF("[  patching ic at %p, test=%p, delta=%d\n",
            address, test_instruction_address, delta);
   }
 
   // Patch with a short conditional jump. Enabling means switching from a short
   // jump-if-carry/not-carry to jump-if-zero/not-zero, whereas disabling is the
   // reverse operation of that.
   Address jmp_address = test_instruction_address - delta;
-  ASSERT((check == ENABLE_INLINED_SMI_CHECK)
+  DCHECK((check == ENABLE_INLINED_SMI_CHECK)
          ? (*jmp_address == Assembler::kJncShortOpcode ||
             *jmp_address == Assembler::kJcShortOpcode)
          : (*jmp_address == Assembler::kJnzShortOpcode ||
             *jmp_address == Assembler::kJzShortOpcode));
   Condition cc = (check == ENABLE_INLINED_SMI_CHECK)
       ? (*jmp_address == Assembler::kJncShortOpcode ? not_zero : zero)
       : (*jmp_address == Assembler::kJnzShortOpcode ? not_carry : carry);
   *jmp_address = static_cast<byte>(Assembler::kJccShortPrefix | cc);
 }
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_X64