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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
| 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
| 7 | 7 |
| 8 #include "src/assembler.h" | 8 #include "src/assembler.h" |
| 9 #include "src/globals.h" | 9 #include "src/globals.h" |
| 10 #include "src/mips64/assembler-mips64.h" | 10 #include "src/mips64/assembler-mips64.h" |
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| 130 return UntagSmiMemOperand(rm, offset - kHeapObjectTag); | 130 return UntagSmiMemOperand(rm, offset - kHeapObjectTag); |
| 131 } | 131 } |
| 132 | 132 |
| 133 | 133 |
| 134 // Generate a MemOperand for storing arguments 5..N on the stack | 134 // Generate a MemOperand for storing arguments 5..N on the stack |
| 135 // when calling CallCFunction(). | 135 // when calling CallCFunction(). |
| 136 // TODO(plind): Currently ONLY used for O32. Should be fixed for | 136 // TODO(plind): Currently ONLY used for O32. Should be fixed for |
| 137 // n64, and used in RegExp code, and other places | 137 // n64, and used in RegExp code, and other places |
| 138 // with more than 8 arguments. | 138 // with more than 8 arguments. |
| 139 inline MemOperand CFunctionArgumentOperand(int index) { | 139 inline MemOperand CFunctionArgumentOperand(int index) { |
| 140 ASSERT(index > kCArgSlotCount); | 140 DCHECK(index > kCArgSlotCount); |
| 141 // Argument 5 takes the slot just past the four Arg-slots. | 141 // Argument 5 takes the slot just past the four Arg-slots. |
| 142 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize; | 142 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize; |
| 143 return MemOperand(sp, offset); | 143 return MemOperand(sp, offset); |
| 144 } | 144 } |
| 145 | 145 |
| 146 | 146 |
| 147 // MacroAssembler implements a collection of frequently used macros. | 147 // MacroAssembler implements a collection of frequently used macros. |
| 148 class MacroAssembler: public Assembler { | 148 class MacroAssembler: public Assembler { |
| 149 public: | 149 public: |
| 150 // The isolate parameter can be NULL if the macro assembler should | 150 // The isolate parameter can be NULL if the macro assembler should |
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| 470 | 470 |
| 471 inline void MarkCode(NopMarkerTypes type) { | 471 inline void MarkCode(NopMarkerTypes type) { |
| 472 nop(type); | 472 nop(type); |
| 473 } | 473 } |
| 474 | 474 |
| 475 // Check if the given instruction is a 'type' marker. | 475 // Check if the given instruction is a 'type' marker. |
| 476 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as | 476 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as |
| 477 // nop(type)). These instructions are generated to mark special location in | 477 // nop(type)). These instructions are generated to mark special location in |
| 478 // the code, like some special IC code. | 478 // the code, like some special IC code. |
| 479 static inline bool IsMarkedCode(Instr instr, int type) { | 479 static inline bool IsMarkedCode(Instr instr, int type) { |
| 480 ASSERT((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)); | 480 DCHECK((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)); |
| 481 return IsNop(instr, type); | 481 return IsNop(instr, type); |
| 482 } | 482 } |
| 483 | 483 |
| 484 | 484 |
| 485 static inline int GetCodeMarker(Instr instr) { | 485 static inline int GetCodeMarker(Instr instr) { |
| 486 uint32_t opcode = ((instr & kOpcodeMask)); | 486 uint32_t opcode = ((instr & kOpcodeMask)); |
| 487 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift); | 487 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift); |
| 488 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift); | 488 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift); |
| 489 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift); | 489 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift); |
| 490 | 490 |
| 491 // Return <n> if we have a sll zero_reg, zero_reg, n | 491 // Return <n> if we have a sll zero_reg, zero_reg, n |
| 492 // else return -1. | 492 // else return -1. |
| 493 bool sllzz = (opcode == SLL && | 493 bool sllzz = (opcode == SLL && |
| 494 rt == static_cast<uint32_t>(ToNumber(zero_reg)) && | 494 rt == static_cast<uint32_t>(ToNumber(zero_reg)) && |
| 495 rs == static_cast<uint32_t>(ToNumber(zero_reg))); | 495 rs == static_cast<uint32_t>(ToNumber(zero_reg))); |
| 496 int type = | 496 int type = |
| 497 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1; | 497 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1; |
| 498 ASSERT((type == -1) || | 498 DCHECK((type == -1) || |
| 499 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER))); | 499 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER))); |
| 500 return type; | 500 return type; |
| 501 } | 501 } |
| 502 | 502 |
| 503 | 503 |
| 504 | 504 |
| 505 // --------------------------------------------------------------------------- | 505 // --------------------------------------------------------------------------- |
| 506 // Allocation support. | 506 // Allocation support. |
| 507 | 507 |
| 508 // Allocate an object in new space or old pointer space. The object_size is | 508 // Allocate an object in new space or old pointer space. The object_size is |
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| 721 void MultiPopReversedFPU(RegList regs); | 721 void MultiPopReversedFPU(RegList regs); |
| 722 | 722 |
| 723 void pop(Register dst) { | 723 void pop(Register dst) { |
| 724 ld(dst, MemOperand(sp, 0)); | 724 ld(dst, MemOperand(sp, 0)); |
| 725 Daddu(sp, sp, Operand(kPointerSize)); | 725 Daddu(sp, sp, Operand(kPointerSize)); |
| 726 } | 726 } |
| 727 void Pop(Register dst) { pop(dst); } | 727 void Pop(Register dst) { pop(dst); } |
| 728 | 728 |
| 729 // Pop two registers. Pops rightmost register first (from lower address). | 729 // Pop two registers. Pops rightmost register first (from lower address). |
| 730 void Pop(Register src1, Register src2) { | 730 void Pop(Register src1, Register src2) { |
| 731 ASSERT(!src1.is(src2)); | 731 DCHECK(!src1.is(src2)); |
| 732 ld(src2, MemOperand(sp, 0 * kPointerSize)); | 732 ld(src2, MemOperand(sp, 0 * kPointerSize)); |
| 733 ld(src1, MemOperand(sp, 1 * kPointerSize)); | 733 ld(src1, MemOperand(sp, 1 * kPointerSize)); |
| 734 Daddu(sp, sp, 2 * kPointerSize); | 734 Daddu(sp, sp, 2 * kPointerSize); |
| 735 } | 735 } |
| 736 | 736 |
| 737 // Pop three registers. Pops rightmost register first (from lower address). | 737 // Pop three registers. Pops rightmost register first (from lower address). |
| 738 void Pop(Register src1, Register src2, Register src3) { | 738 void Pop(Register src1, Register src2, Register src3) { |
| 739 ld(src3, MemOperand(sp, 0 * kPointerSize)); | 739 ld(src3, MemOperand(sp, 0 * kPointerSize)); |
| 740 ld(src2, MemOperand(sp, 1 * kPointerSize)); | 740 ld(src2, MemOperand(sp, 1 * kPointerSize)); |
| 741 ld(src1, MemOperand(sp, 2 * kPointerSize)); | 741 ld(src1, MemOperand(sp, 2 * kPointerSize)); |
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| 1123 | 1123 |
| 1124 // Load and check the instance type of an object for being a string. | 1124 // Load and check the instance type of an object for being a string. |
| 1125 // Loads the type into the second argument register. | 1125 // Loads the type into the second argument register. |
| 1126 // Returns a condition that will be enabled if the object was a string. | 1126 // Returns a condition that will be enabled if the object was a string. |
| 1127 Condition IsObjectStringType(Register obj, | 1127 Condition IsObjectStringType(Register obj, |
| 1128 Register type, | 1128 Register type, |
| 1129 Register result) { | 1129 Register result) { |
| 1130 ld(type, FieldMemOperand(obj, HeapObject::kMapOffset)); | 1130 ld(type, FieldMemOperand(obj, HeapObject::kMapOffset)); |
| 1131 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset)); | 1131 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset)); |
| 1132 And(type, type, Operand(kIsNotStringMask)); | 1132 And(type, type, Operand(kIsNotStringMask)); |
| 1133 ASSERT_EQ(0, kStringTag); | 1133 DCHECK_EQ(0, kStringTag); |
| 1134 return eq; | 1134 return eq; |
| 1135 } | 1135 } |
| 1136 | 1136 |
| 1137 | 1137 |
| 1138 // Picks out an array index from the hash field. | 1138 // Picks out an array index from the hash field. |
| 1139 // Register use: | 1139 // Register use: |
| 1140 // hash - holds the index's hash. Clobbered. | 1140 // hash - holds the index's hash. Clobbered. |
| 1141 // index - holds the overwritten index on exit. | 1141 // index - holds the overwritten index on exit. |
| 1142 void IndexFromHash(Register hash, Register index); | 1142 void IndexFromHash(Register hash, Register index); |
| 1143 | 1143 |
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| 1335 // Store the function for the given builtin in the target register. | 1335 // Store the function for the given builtin in the target register. |
| 1336 void GetBuiltinFunction(Register target, Builtins::JavaScript id); | 1336 void GetBuiltinFunction(Register target, Builtins::JavaScript id); |
| 1337 | 1337 |
| 1338 struct Unresolved { | 1338 struct Unresolved { |
| 1339 int pc; | 1339 int pc; |
| 1340 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders. | 1340 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders. |
| 1341 const char* name; | 1341 const char* name; |
| 1342 }; | 1342 }; |
| 1343 | 1343 |
| 1344 Handle<Object> CodeObject() { | 1344 Handle<Object> CodeObject() { |
| 1345 ASSERT(!code_object_.is_null()); | 1345 DCHECK(!code_object_.is_null()); |
| 1346 return code_object_; | 1346 return code_object_; |
| 1347 } | 1347 } |
| 1348 | 1348 |
| 1349 // Emit code for a truncating division by a constant. The dividend register is | 1349 // Emit code for a truncating division by a constant. The dividend register is |
| 1350 // unchanged and at gets clobbered. Dividend and result must be different. | 1350 // unchanged and at gets clobbered. Dividend and result must be different. |
| 1351 void TruncatingDiv(Register result, Register dividend, int32_t divisor); | 1351 void TruncatingDiv(Register result, Register dividend, int32_t divisor); |
| 1352 | 1352 |
| 1353 // ------------------------------------------------------------------------- | 1353 // ------------------------------------------------------------------------- |
| 1354 // StatsCounter support. | 1354 // StatsCounter support. |
| 1355 | 1355 |
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| 1446 void SmiUntag(Register reg) { | 1446 void SmiUntag(Register reg) { |
| 1447 SmiUntag(reg, reg); | 1447 SmiUntag(reg, reg); |
| 1448 } | 1448 } |
| 1449 | 1449 |
| 1450 // Left-shifted from int32 equivalent of Smi. | 1450 // Left-shifted from int32 equivalent of Smi. |
| 1451 void SmiScale(Register dst, Register src, int scale) { | 1451 void SmiScale(Register dst, Register src, int scale) { |
| 1452 if (SmiValuesAre32Bits()) { | 1452 if (SmiValuesAre32Bits()) { |
| 1453 // The int portion is upper 32-bits of 64-bit word. | 1453 // The int portion is upper 32-bits of 64-bit word. |
| 1454 dsra(dst, src, kSmiShift - scale); | 1454 dsra(dst, src, kSmiShift - scale); |
| 1455 } else { | 1455 } else { |
| 1456 ASSERT(scale >= kSmiTagSize); | 1456 DCHECK(scale >= kSmiTagSize); |
| 1457 sll(dst, src, scale - kSmiTagSize); | 1457 sll(dst, src, scale - kSmiTagSize); |
| 1458 } | 1458 } |
| 1459 } | 1459 } |
| 1460 | 1460 |
| 1461 // Combine load with untagging or scaling. | 1461 // Combine load with untagging or scaling. |
| 1462 void SmiLoadUntag(Register dst, MemOperand src); | 1462 void SmiLoadUntag(Register dst, MemOperand src); |
| 1463 | 1463 |
| 1464 void SmiLoadScale(Register dst, MemOperand src, int scale); | 1464 void SmiLoadScale(Register dst, MemOperand src, int scale); |
| 1465 | 1465 |
| 1466 // Returns 2 values: the Smi and a scaled version of the int within the Smi. | 1466 // Returns 2 values: the Smi and a scaled version of the int within the Smi. |
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| 1784 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) | 1784 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) |
| 1785 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) | 1785 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) |
| 1786 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 1786 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
| 1787 #else | 1787 #else |
| 1788 #define ACCESS_MASM(masm) masm-> | 1788 #define ACCESS_MASM(masm) masm-> |
| 1789 #endif | 1789 #endif |
| 1790 | 1790 |
| 1791 } } // namespace v8::internal | 1791 } } // namespace v8::internal |
| 1792 | 1792 |
| 1793 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 1793 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
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