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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 430503007: Rename ASSERT* to DCHECK*. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE and fixes Created 6 years, 4 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h" 10 #include "src/mips/assembler-mips.h"
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109 109
110 // Generate a MemOperand for loading a field from an object. 110 // Generate a MemOperand for loading a field from an object.
111 inline MemOperand FieldMemOperand(Register object, int offset) { 111 inline MemOperand FieldMemOperand(Register object, int offset) {
112 return MemOperand(object, offset - kHeapObjectTag); 112 return MemOperand(object, offset - kHeapObjectTag);
113 } 113 }
114 114
115 115
116 // Generate a MemOperand for storing arguments 5..N on the stack 116 // Generate a MemOperand for storing arguments 5..N on the stack
117 // when calling CallCFunction(). 117 // when calling CallCFunction().
118 inline MemOperand CFunctionArgumentOperand(int index) { 118 inline MemOperand CFunctionArgumentOperand(int index) {
119 ASSERT(index > kCArgSlotCount); 119 DCHECK(index > kCArgSlotCount);
120 // Argument 5 takes the slot just past the four Arg-slots. 120 // Argument 5 takes the slot just past the four Arg-slots.
121 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize; 121 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize;
122 return MemOperand(sp, offset); 122 return MemOperand(sp, offset);
123 } 123 }
124 124
125 125
126 // MacroAssembler implements a collection of frequently used macros. 126 // MacroAssembler implements a collection of frequently used macros.
127 class MacroAssembler: public Assembler { 127 class MacroAssembler: public Assembler {
128 public: 128 public:
129 // The isolate parameter can be NULL if the macro assembler should 129 // The isolate parameter can be NULL if the macro assembler should
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449 449
450 inline void MarkCode(NopMarkerTypes type) { 450 inline void MarkCode(NopMarkerTypes type) {
451 nop(type); 451 nop(type);
452 } 452 }
453 453
454 // Check if the given instruction is a 'type' marker. 454 // Check if the given instruction is a 'type' marker.
455 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as 455 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
456 // nop(type)). These instructions are generated to mark special location in 456 // nop(type)). These instructions are generated to mark special location in
457 // the code, like some special IC code. 457 // the code, like some special IC code.
458 static inline bool IsMarkedCode(Instr instr, int type) { 458 static inline bool IsMarkedCode(Instr instr, int type) {
459 ASSERT((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)); 459 DCHECK((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
460 return IsNop(instr, type); 460 return IsNop(instr, type);
461 } 461 }
462 462
463 463
464 static inline int GetCodeMarker(Instr instr) { 464 static inline int GetCodeMarker(Instr instr) {
465 uint32_t opcode = ((instr & kOpcodeMask)); 465 uint32_t opcode = ((instr & kOpcodeMask));
466 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift); 466 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift);
467 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift); 467 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift);
468 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift); 468 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift);
469 469
470 // Return <n> if we have a sll zero_reg, zero_reg, n 470 // Return <n> if we have a sll zero_reg, zero_reg, n
471 // else return -1. 471 // else return -1.
472 bool sllzz = (opcode == SLL && 472 bool sllzz = (opcode == SLL &&
473 rt == static_cast<uint32_t>(ToNumber(zero_reg)) && 473 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
474 rs == static_cast<uint32_t>(ToNumber(zero_reg))); 474 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
475 int type = 475 int type =
476 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1; 476 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1;
477 ASSERT((type == -1) || 477 DCHECK((type == -1) ||
478 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER))); 478 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
479 return type; 479 return type;
480 } 480 }
481 481
482 482
483 483
484 // --------------------------------------------------------------------------- 484 // ---------------------------------------------------------------------------
485 // Allocation support. 485 // Allocation support.
486 486
487 // Allocate an object in new space or old pointer space. The object_size is 487 // Allocate an object in new space or old pointer space. The object_size is
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682 void MultiPopReversedFPU(RegList regs); 682 void MultiPopReversedFPU(RegList regs);
683 683
684 void pop(Register dst) { 684 void pop(Register dst) {
685 lw(dst, MemOperand(sp, 0)); 685 lw(dst, MemOperand(sp, 0));
686 Addu(sp, sp, Operand(kPointerSize)); 686 Addu(sp, sp, Operand(kPointerSize));
687 } 687 }
688 void Pop(Register dst) { pop(dst); } 688 void Pop(Register dst) { pop(dst); }
689 689
690 // Pop two registers. Pops rightmost register first (from lower address). 690 // Pop two registers. Pops rightmost register first (from lower address).
691 void Pop(Register src1, Register src2) { 691 void Pop(Register src1, Register src2) {
692 ASSERT(!src1.is(src2)); 692 DCHECK(!src1.is(src2));
693 lw(src2, MemOperand(sp, 0 * kPointerSize)); 693 lw(src2, MemOperand(sp, 0 * kPointerSize));
694 lw(src1, MemOperand(sp, 1 * kPointerSize)); 694 lw(src1, MemOperand(sp, 1 * kPointerSize));
695 Addu(sp, sp, 2 * kPointerSize); 695 Addu(sp, sp, 2 * kPointerSize);
696 } 696 }
697 697
698 // Pop three registers. Pops rightmost register first (from lower address). 698 // Pop three registers. Pops rightmost register first (from lower address).
699 void Pop(Register src1, Register src2, Register src3) { 699 void Pop(Register src1, Register src2, Register src3) {
700 lw(src3, MemOperand(sp, 0 * kPointerSize)); 700 lw(src3, MemOperand(sp, 0 * kPointerSize));
701 lw(src2, MemOperand(sp, 1 * kPointerSize)); 701 lw(src2, MemOperand(sp, 1 * kPointerSize));
702 lw(src1, MemOperand(sp, 2 * kPointerSize)); 702 lw(src1, MemOperand(sp, 2 * kPointerSize));
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1069 1069
1070 // Load and check the instance type of an object for being a string. 1070 // Load and check the instance type of an object for being a string.
1071 // Loads the type into the second argument register. 1071 // Loads the type into the second argument register.
1072 // Returns a condition that will be enabled if the object was a string. 1072 // Returns a condition that will be enabled if the object was a string.
1073 Condition IsObjectStringType(Register obj, 1073 Condition IsObjectStringType(Register obj,
1074 Register type, 1074 Register type,
1075 Register result) { 1075 Register result) {
1076 lw(type, FieldMemOperand(obj, HeapObject::kMapOffset)); 1076 lw(type, FieldMemOperand(obj, HeapObject::kMapOffset));
1077 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset)); 1077 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset));
1078 And(type, type, Operand(kIsNotStringMask)); 1078 And(type, type, Operand(kIsNotStringMask));
1079 ASSERT_EQ(0, kStringTag); 1079 DCHECK_EQ(0, kStringTag);
1080 return eq; 1080 return eq;
1081 } 1081 }
1082 1082
1083 1083
1084 // Picks out an array index from the hash field. 1084 // Picks out an array index from the hash field.
1085 // Register use: 1085 // Register use:
1086 // hash - holds the index's hash. Clobbered. 1086 // hash - holds the index's hash. Clobbered.
1087 // index - holds the overwritten index on exit. 1087 // index - holds the overwritten index on exit.
1088 void IndexFromHash(Register hash, Register index); 1088 void IndexFromHash(Register hash, Register index);
1089 1089
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1281 // Store the function for the given builtin in the target register. 1281 // Store the function for the given builtin in the target register.
1282 void GetBuiltinFunction(Register target, Builtins::JavaScript id); 1282 void GetBuiltinFunction(Register target, Builtins::JavaScript id);
1283 1283
1284 struct Unresolved { 1284 struct Unresolved {
1285 int pc; 1285 int pc;
1286 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders. 1286 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders.
1287 const char* name; 1287 const char* name;
1288 }; 1288 };
1289 1289
1290 Handle<Object> CodeObject() { 1290 Handle<Object> CodeObject() {
1291 ASSERT(!code_object_.is_null()); 1291 DCHECK(!code_object_.is_null());
1292 return code_object_; 1292 return code_object_;
1293 } 1293 }
1294 1294
1295 // Emit code for a truncating division by a constant. The dividend register is 1295 // Emit code for a truncating division by a constant. The dividend register is
1296 // unchanged and at gets clobbered. Dividend and result must be different. 1296 // unchanged and at gets clobbered. Dividend and result must be different.
1297 void TruncatingDiv(Register result, Register dividend, int32_t divisor); 1297 void TruncatingDiv(Register result, Register dividend, int32_t divisor);
1298 1298
1299 // ------------------------------------------------------------------------- 1299 // -------------------------------------------------------------------------
1300 // StatsCounter support. 1300 // StatsCounter support.
1301 1301
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1694 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) 1694 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1695 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1695 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1696 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1696 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1697 #else 1697 #else
1698 #define ACCESS_MASM(masm) masm-> 1698 #define ACCESS_MASM(masm) masm->
1699 #endif 1699 #endif
1700 1700
1701 } } // namespace v8::internal 1701 } } // namespace v8::internal
1702 1702
1703 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1703 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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