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Side by Side Diff: src/ia32/code-stubs-ia32.h

Issue 430503007: Rename ASSERT* to DCHECK*. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE and fixes Created 6 years, 4 months ago
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1 // Copyright 2011 the V8 project authors. All rights reserved. 1 // Copyright 2011 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_IA32_CODE_STUBS_IA32_H_ 5 #ifndef V8_IA32_CODE_STUBS_IA32_H_
6 #define V8_IA32_CODE_STUBS_IA32_H_ 6 #define V8_IA32_CODE_STUBS_IA32_H_
7 7
8 #include "src/ic-inl.h" 8 #include "src/ic-inl.h"
9 #include "src/macro-assembler.h" 9 #include "src/macro-assembler.h"
10 10
(...skipping 200 matching lines...) Expand 10 before | Expand all | Expand 10 after
211 static const byte kFiveByteJumpInstruction = 0xe9; // Jmp #imm32. 211 static const byte kFiveByteJumpInstruction = 0xe9; // Jmp #imm32.
212 212
213 static Mode GetMode(Code* stub) { 213 static Mode GetMode(Code* stub) {
214 byte first_instruction = stub->instruction_start()[0]; 214 byte first_instruction = stub->instruction_start()[0];
215 byte second_instruction = stub->instruction_start()[2]; 215 byte second_instruction = stub->instruction_start()[2];
216 216
217 if (first_instruction == kTwoByteJumpInstruction) { 217 if (first_instruction == kTwoByteJumpInstruction) {
218 return INCREMENTAL; 218 return INCREMENTAL;
219 } 219 }
220 220
221 ASSERT(first_instruction == kTwoByteNopInstruction); 221 DCHECK(first_instruction == kTwoByteNopInstruction);
222 222
223 if (second_instruction == kFiveByteJumpInstruction) { 223 if (second_instruction == kFiveByteJumpInstruction) {
224 return INCREMENTAL_COMPACTION; 224 return INCREMENTAL_COMPACTION;
225 } 225 }
226 226
227 ASSERT(second_instruction == kFiveByteNopInstruction); 227 DCHECK(second_instruction == kFiveByteNopInstruction);
228 228
229 return STORE_BUFFER_ONLY; 229 return STORE_BUFFER_ONLY;
230 } 230 }
231 231
232 static void Patch(Code* stub, Mode mode) { 232 static void Patch(Code* stub, Mode mode) {
233 switch (mode) { 233 switch (mode) {
234 case STORE_BUFFER_ONLY: 234 case STORE_BUFFER_ONLY:
235 ASSERT(GetMode(stub) == INCREMENTAL || 235 DCHECK(GetMode(stub) == INCREMENTAL ||
236 GetMode(stub) == INCREMENTAL_COMPACTION); 236 GetMode(stub) == INCREMENTAL_COMPACTION);
237 stub->instruction_start()[0] = kTwoByteNopInstruction; 237 stub->instruction_start()[0] = kTwoByteNopInstruction;
238 stub->instruction_start()[2] = kFiveByteNopInstruction; 238 stub->instruction_start()[2] = kFiveByteNopInstruction;
239 break; 239 break;
240 case INCREMENTAL: 240 case INCREMENTAL:
241 ASSERT(GetMode(stub) == STORE_BUFFER_ONLY); 241 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
242 stub->instruction_start()[0] = kTwoByteJumpInstruction; 242 stub->instruction_start()[0] = kTwoByteJumpInstruction;
243 break; 243 break;
244 case INCREMENTAL_COMPACTION: 244 case INCREMENTAL_COMPACTION:
245 ASSERT(GetMode(stub) == STORE_BUFFER_ONLY); 245 DCHECK(GetMode(stub) == STORE_BUFFER_ONLY);
246 stub->instruction_start()[0] = kTwoByteNopInstruction; 246 stub->instruction_start()[0] = kTwoByteNopInstruction;
247 stub->instruction_start()[2] = kFiveByteJumpInstruction; 247 stub->instruction_start()[2] = kFiveByteJumpInstruction;
248 break; 248 break;
249 } 249 }
250 ASSERT(GetMode(stub) == mode); 250 DCHECK(GetMode(stub) == mode);
251 CpuFeatures::FlushICache(stub->instruction_start(), 7); 251 CpuFeatures::FlushICache(stub->instruction_start(), 7);
252 } 252 }
253 253
254 private: 254 private:
255 // This is a helper class for freeing up 3 scratch registers, where the third 255 // This is a helper class for freeing up 3 scratch registers, where the third
256 // is always ecx (needed for shift operations). The input is two registers 256 // is always ecx (needed for shift operations). The input is two registers
257 // that must be preserved and one scratch register provided by the caller. 257 // that must be preserved and one scratch register provided by the caller.
258 class RegisterAllocation { 258 class RegisterAllocation {
259 public: 259 public:
260 RegisterAllocation(Register object, 260 RegisterAllocation(Register object,
261 Register address, 261 Register address,
262 Register scratch0) 262 Register scratch0)
263 : object_orig_(object), 263 : object_orig_(object),
264 address_orig_(address), 264 address_orig_(address),
265 scratch0_orig_(scratch0), 265 scratch0_orig_(scratch0),
266 object_(object), 266 object_(object),
267 address_(address), 267 address_(address),
268 scratch0_(scratch0) { 268 scratch0_(scratch0) {
269 ASSERT(!AreAliased(scratch0, object, address, no_reg)); 269 DCHECK(!AreAliased(scratch0, object, address, no_reg));
270 scratch1_ = GetRegThatIsNotEcxOr(object_, address_, scratch0_); 270 scratch1_ = GetRegThatIsNotEcxOr(object_, address_, scratch0_);
271 if (scratch0.is(ecx)) { 271 if (scratch0.is(ecx)) {
272 scratch0_ = GetRegThatIsNotEcxOr(object_, address_, scratch1_); 272 scratch0_ = GetRegThatIsNotEcxOr(object_, address_, scratch1_);
273 } 273 }
274 if (object.is(ecx)) { 274 if (object.is(ecx)) {
275 object_ = GetRegThatIsNotEcxOr(address_, scratch0_, scratch1_); 275 object_ = GetRegThatIsNotEcxOr(address_, scratch0_, scratch1_);
276 } 276 }
277 if (address.is(ecx)) { 277 if (address.is(ecx)) {
278 address_ = GetRegThatIsNotEcxOr(object_, scratch0_, scratch1_); 278 address_ = GetRegThatIsNotEcxOr(object_, scratch0_, scratch1_);
279 } 279 }
280 ASSERT(!AreAliased(scratch0_, object_, address_, ecx)); 280 DCHECK(!AreAliased(scratch0_, object_, address_, ecx));
281 } 281 }
282 282
283 void Save(MacroAssembler* masm) { 283 void Save(MacroAssembler* masm) {
284 ASSERT(!address_orig_.is(object_)); 284 DCHECK(!address_orig_.is(object_));
285 ASSERT(object_.is(object_orig_) || address_.is(address_orig_)); 285 DCHECK(object_.is(object_orig_) || address_.is(address_orig_));
286 ASSERT(!AreAliased(object_, address_, scratch1_, scratch0_)); 286 DCHECK(!AreAliased(object_, address_, scratch1_, scratch0_));
287 ASSERT(!AreAliased(object_orig_, address_, scratch1_, scratch0_)); 287 DCHECK(!AreAliased(object_orig_, address_, scratch1_, scratch0_));
288 ASSERT(!AreAliased(object_, address_orig_, scratch1_, scratch0_)); 288 DCHECK(!AreAliased(object_, address_orig_, scratch1_, scratch0_));
289 // We don't have to save scratch0_orig_ because it was given to us as 289 // We don't have to save scratch0_orig_ because it was given to us as
290 // a scratch register. But if we had to switch to a different reg then 290 // a scratch register. But if we had to switch to a different reg then
291 // we should save the new scratch0_. 291 // we should save the new scratch0_.
292 if (!scratch0_.is(scratch0_orig_)) masm->push(scratch0_); 292 if (!scratch0_.is(scratch0_orig_)) masm->push(scratch0_);
293 if (!ecx.is(scratch0_orig_) && 293 if (!ecx.is(scratch0_orig_) &&
294 !ecx.is(object_orig_) && 294 !ecx.is(object_orig_) &&
295 !ecx.is(address_orig_)) { 295 !ecx.is(address_orig_)) {
296 masm->push(ecx); 296 masm->push(ecx);
297 } 297 }
298 masm->push(scratch1_); 298 masm->push(scratch1_);
(...skipping 131 matching lines...) Expand 10 before | Expand all | Expand 10 after
430 Register address_; 430 Register address_;
431 RememberedSetAction remembered_set_action_; 431 RememberedSetAction remembered_set_action_;
432 SaveFPRegsMode save_fp_regs_mode_; 432 SaveFPRegsMode save_fp_regs_mode_;
433 RegisterAllocation regs_; 433 RegisterAllocation regs_;
434 }; 434 };
435 435
436 436
437 } } // namespace v8::internal 437 } } // namespace v8::internal
438 438
439 #endif // V8_IA32_CODE_STUBS_IA32_H_ 439 #endif // V8_IA32_CODE_STUBS_IA32_H_
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