Rename ASSERT* to DCHECK*.

src/arm64/macro-assembler-arm64.h

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
 #define V8_ARM64_MACRO_ASSEMBLER_ARM64_H_
 
 #include <vector>
 
 #include "src/globals.h"
@@ skipping 348 matching lines @@
   inline void Fmov(FPRegister fd, Register rn);
   // Provide explicit double and float interfaces for FP immediate moves, rather
   // than relying on implicit C++ casts. This allows signalling NaNs to be
   // preserved when the immediate matches the format of fd. Most systems convert
   // signalling NaNs to quiet NaNs when converting between float and double.
   inline void Fmov(FPRegister fd, double imm);
   inline void Fmov(FPRegister fd, float imm);
   // Provide a template to allow other types to be converted automatically.
   template<typename T>
   void Fmov(FPRegister fd, T imm) {
-    ASSERT(allow_macro_instructions_);
+    DCHECK(allow_macro_instructions_);
     Fmov(fd, static_cast<double>(imm));
   }
   inline void Fmov(Register rd, FPRegister fn);
   inline void Fmsub(const FPRegister& fd,
                     const FPRegister& fn,
                     const FPRegister& fm,
                     const FPRegister& fa);
   inline void Fmul(const FPRegister& fd,
                    const FPRegister& fn,
                    const FPRegister& fm);
@@ skipping 232 matching lines @@
   // allows push requests to be queued up, then flushed at once. The
   // MacroAssembler will try to generate the most efficient sequence required.
   //
   // Unlike the other Push and Pop macros, PushPopQueue can handle mixed sets of
   // register sizes and types.
   class PushPopQueue {
    public:
     explicit PushPopQueue(MacroAssembler* masm) : masm_(masm), size_(0) { }
 
     ~PushPopQueue() {
-      ASSERT(queued_.empty());
+      DCHECK(queued_.empty());
     }
 
     void Queue(const CPURegister& rt) {
       size_ += rt.SizeInBytes();
       queued_.push_back(rt);
     }
 
     enum PreambleDirective {
       WITH_PREAMBLE,
       SKIP_PREAMBLE
@@ skipping 131 matching lines @@
   // Floating-point registers are popped after general-purpose registers, and
   // thus come from higher addresses.
   //
   // This method must not be called unless the current stack pointer (as set by
   // SetStackPointer) is the system stack pointer (csp), and is aligned to
   // ActivationFrameAlignment().
   void PopCalleeSavedRegisters();
 
   // Set the current stack pointer, but don't generate any code.
   inline void SetStackPointer(const Register& stack_pointer) {
-    ASSERT(!TmpList()->IncludesAliasOf(stack_pointer));
+    DCHECK(!TmpList()->IncludesAliasOf(stack_pointer));
     sp_ = stack_pointer;
   }
 
   // Return the current stack pointer, as set by SetStackPointer.
   inline const Register& StackPointer() const {
     return sp_;
   }
 
   // Align csp for a frame, as per ActivationFrameAlignment, and make it the
   // current stack pointer.
   inline void AlignAndSetCSPForFrame() {
     int sp_alignment = ActivationFrameAlignment();
     // AAPCS64 mandates at least 16-byte alignment.
-    ASSERT(sp_alignment >= 16);
-    ASSERT(IsPowerOf2(sp_alignment));
+    DCHECK(sp_alignment >= 16);
+    DCHECK(IsPowerOf2(sp_alignment));
     Bic(csp, StackPointer(), sp_alignment - 1);
     SetStackPointer(csp);
   }
 
   // Push the system stack pointer (csp) down to allow the same to be done to
   // the current stack pointer (according to StackPointer()). This must be
   // called _before_ accessing the memory.
   //
   // This is necessary when pushing or otherwise adding things to the stack, to
   // satisfy the AAPCS64 constraint that the memory below the system stack
@@ skipping 34 matching lines @@
   // Load both TrueValue and FalseValue roots.
   void LoadTrueFalseRoots(Register true_root, Register false_root);
 
   void LoadHeapObject(Register dst, Handle<HeapObject> object);
 
   void LoadObject(Register result, Handle<Object> object) {
     AllowDeferredHandleDereference heap_object_check;
     if (object->IsHeapObject()) {
       LoadHeapObject(result, Handle<HeapObject>::cast(object));
     } else {
-      ASSERT(object->IsSmi());
+      DCHECK(object->IsSmi());
       Mov(result, Operand(object));
     }
   }
 
   static int SafepointRegisterStackIndex(int reg_code);
 
   // This is required for compatibility with architecture independant code.
   // Remove if not needed.
   inline void Move(Register dst, Register src) { Mov(dst, src); }
 
@@ skipping 119 matching lines @@
   // Try to represent a double as a signed 32-bit int.
   // This succeeds if the result compares equal to the input, so inputs of -0.0
   // are represented as 0 and handled as a success.
   //
   // On output the Z flag is set if the operation was successful.
   void TryRepresentDoubleAsInt32(Register as_int,
                                  FPRegister value,
                                  FPRegister scratch_d,
                                  Label* on_successful_conversion = NULL,
                                  Label* on_failed_conversion = NULL) {
-    ASSERT(as_int.Is32Bits());
+    DCHECK(as_int.Is32Bits());
     TryRepresentDoubleAsInt(as_int, value, scratch_d, on_successful_conversion,
                             on_failed_conversion);
   }
 
   // Try to represent a double as a signed 64-bit int.
   // This succeeds if the result compares equal to the input, so inputs of -0.0
   // are represented as 0 and handled as a success.
   //
   // On output the Z flag is set if the operation was successful.
   void TryRepresentDoubleAsInt64(Register as_int,
                                  FPRegister value,
                                  FPRegister scratch_d,
                                  Label* on_successful_conversion = NULL,
                                  Label* on_failed_conversion = NULL) {
-    ASSERT(as_int.Is64Bits());
+    DCHECK(as_int.Is64Bits());
     TryRepresentDoubleAsInt(as_int, value, scratch_d, on_successful_conversion,
                             on_failed_conversion);
   }
 
   // ---- Object Utilities ----
 
   // Copy fields from 'src' to 'dst', where both are tagged objects.
   // The 'temps' list is a list of X registers which can be used for scratch
   // values. The temps list must include at least one register.
   //
@@ skipping 1187 matching lines @@
     }
     previous_allow_macro_instructions_ = masm_->allow_macro_instructions();
     masm_->set_allow_macro_instructions(false);
 #endif
   }
 
   ~InstructionAccurateScope() {
     masm_->EndBlockPools();
 #ifdef DEBUG
     if (start_.is_bound()) {
-      ASSERT(masm_->SizeOfCodeGeneratedSince(&start_) == size_);
+      DCHECK(masm_->SizeOfCodeGeneratedSince(&start_) == size_);
     }
     masm_->set_allow_macro_instructions(previous_allow_macro_instructions_);
 #endif
   }
 
  private:
   MacroAssembler* masm_;
 #ifdef DEBUG
   size_t size_;
   Label start_;
   bool previous_allow_macro_instructions_;
 #endif
 };
 
 
 // This scope utility allows scratch registers to be managed safely. The
 // MacroAssembler's TmpList() (and FPTmpList()) is used as a pool of scratch
 // registers. These registers can be allocated on demand, and will be returned
 // at the end of the scope.
 //
 // When the scope ends, the MacroAssembler's lists will be restored to their
 // original state, even if the lists were modified by some other means.
 class UseScratchRegisterScope {
  public:
   explicit UseScratchRegisterScope(MacroAssembler* masm)
       : available_(masm->TmpList()),
         availablefp_(masm->FPTmpList()),
         old_available_(available_->list()),
         old_availablefp_(availablefp_->list()) {
-    ASSERT(available_->type() == CPURegister::kRegister);
-    ASSERT(availablefp_->type() == CPURegister::kFPRegister);
+    DCHECK(available_->type() == CPURegister::kRegister);
+    DCHECK(availablefp_->type() == CPURegister::kFPRegister);
   }
 
   ~UseScratchRegisterScope();
 
   // Take a register from the appropriate temps list. It will be returned
   // automatically when the scope ends.
   Register AcquireW() { return AcquireNextAvailable(available_).W(); }
   Register AcquireX() { return AcquireNextAvailable(available_).X(); }
   FPRegister AcquireS() { return AcquireNextAvailable(availablefp_).S(); }
   FPRegister AcquireD() { return AcquireNextAvailable(availablefp_).D(); }
@@ skipping 83 matching lines @@
 #error "Unsupported option"
 #define CODE_COVERAGE_STRINGIFY(x) #x
 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
 #else
 #define ACCESS_MASM(masm) masm->
 #endif
 
 #endif  // V8_ARM64_MACRO_ASSEMBLER_ARM64_H_