Rename ASSERT* to DCHECK*.

src/arm64/debug-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_ARM64
 
 #include "src/codegen.h"
 #include "src/debug.h"
@@ skipping 49 matching lines @@
 
 
 void BreakLocationIterator::ClearDebugBreakAtReturn() {
   // Reset the code emitted by EmitReturnSequence to its original state.
   rinfo()->PatchCode(original_rinfo()->pc(),
                      Assembler::kJSRetSequenceInstructions);
 }
 
 
 bool Debug::IsDebugBreakAtReturn(RelocInfo* rinfo) {
-  ASSERT(RelocInfo::IsJSReturn(rinfo->rmode()));
+  DCHECK(RelocInfo::IsJSReturn(rinfo->rmode()));
   return rinfo->IsPatchedReturnSequence();
 }
 
 
 bool BreakLocationIterator::IsDebugBreakAtSlot() {
-  ASSERT(IsDebugBreakSlot());
+  DCHECK(IsDebugBreakSlot());
   // Check whether the debug break slot instructions have been patched.
   return rinfo()->IsPatchedDebugBreakSlotSequence();
 }
 
 
 void BreakLocationIterator::SetDebugBreakAtSlot() {
   // Patch the code emitted by DebugCodegen::GenerateSlots, changing the debug
   // break slot code from
   //   mov x0, x0    @ nop DEBUG_BREAK_NOP
   //   mov x0, x0    @ nop DEBUG_BREAK_NOP
@@ skipping 24 matching lines @@
   // code. By using blr, event hough control will not return after the branch,
   // this call site will be registered in the frame (lr being saved as the pc
   // of the next instruction to execute for this frame). The debugger can now
   // iterate on the frames to find call to debug break slot code.
   patcher.blr(ip0);
   patcher.dc64(reinterpret_cast<int64_t>(entry));
 }
 
 
 void BreakLocationIterator::ClearDebugBreakAtSlot() {
-  ASSERT(IsDebugBreakSlot());
+  DCHECK(IsDebugBreakSlot());
   rinfo()->PatchCode(original_rinfo()->pc(),
                      Assembler::kDebugBreakSlotInstructions);
 }
 
 
 static void Generate_DebugBreakCallHelper(MacroAssembler* masm,
                                           RegList object_regs,
                                           RegList non_object_regs,
                                           Register scratch) {
   {
@@ skipping 11 matching lines @@
     //
     // Also:
     //  * object_regs may be modified during the C code by the garbage
     //    collector. Every object register must be a valid tagged pointer or
     //    SMI.
     //
     //  * non_object_regs will be converted to SMIs so that the garbage
     //    collector doesn't try to interpret them as pointers.
     //
     // TODO(jbramley): Why can't this handle callee-saved registers?
-    ASSERT((~kCallerSaved.list() & object_regs) == 0);
-    ASSERT((~kCallerSaved.list() & non_object_regs) == 0);
-    ASSERT((object_regs & non_object_regs) == 0);
-    ASSERT((scratch.Bit() & object_regs) == 0);
-    ASSERT((scratch.Bit() & non_object_regs) == 0);
-    ASSERT((masm->TmpList()->list() & (object_regs | non_object_regs)) == 0);
+    DCHECK((~kCallerSaved.list() & object_regs) == 0);
+    DCHECK((~kCallerSaved.list() & non_object_regs) == 0);
+    DCHECK((object_regs & non_object_regs) == 0);
+    DCHECK((scratch.Bit() & object_regs) == 0);
+    DCHECK((scratch.Bit() & non_object_regs) == 0);
+    DCHECK((masm->TmpList()->list() & (object_regs | non_object_regs)) == 0);
     STATIC_ASSERT(kSmiValueSize == 32);
 
     CPURegList non_object_list =
         CPURegList(CPURegister::kRegister, kXRegSizeInBits, non_object_regs);
     while (!non_object_list.IsEmpty()) {
       // Store each non-object register as two SMIs.
       Register reg = Register(non_object_list.PopLowestIndex());
       __ Lsr(scratch, reg, 32);
       __ SmiTagAndPush(scratch, reg);
 
@@ skipping 200 matching lines @@
   // Re-run JSFunction, x1 is function, cp is context.
   __ Br(scratch);
 }
 
 
 const bool LiveEdit::kFrameDropperSupported = true;
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM64