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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // CPU specific code for arm independent of OS goes here. | 5 // CPU specific code for arm independent of OS goes here. |
6 | 6 |
7 #include "src/v8.h" | 7 #include "src/v8.h" |
8 | 8 |
9 #if V8_TARGET_ARCH_ARM64 | 9 #if V8_TARGET_ARCH_ARM64 |
10 | 10 |
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52 // The code below assumes user space cache operations are allowed. The goal | 52 // The code below assumes user space cache operations are allowed. The goal |
53 // of this routine is to make sure the code generated is visible to the I | 53 // of this routine is to make sure the code generated is visible to the I |
54 // side of the CPU. | 54 // side of the CPU. |
55 | 55 |
56 uintptr_t start = reinterpret_cast<uintptr_t>(address); | 56 uintptr_t start = reinterpret_cast<uintptr_t>(address); |
57 // Sizes will be used to generate a mask big enough to cover a pointer. | 57 // Sizes will be used to generate a mask big enough to cover a pointer. |
58 CacheLineSizes sizes; | 58 CacheLineSizes sizes; |
59 uintptr_t dsize = sizes.dcache_line_size(); | 59 uintptr_t dsize = sizes.dcache_line_size(); |
60 uintptr_t isize = sizes.icache_line_size(); | 60 uintptr_t isize = sizes.icache_line_size(); |
61 // Cache line sizes are always a power of 2. | 61 // Cache line sizes are always a power of 2. |
62 ASSERT(CountSetBits(dsize, 64) == 1); | 62 DCHECK(CountSetBits(dsize, 64) == 1); |
63 ASSERT(CountSetBits(isize, 64) == 1); | 63 DCHECK(CountSetBits(isize, 64) == 1); |
64 uintptr_t dstart = start & ~(dsize - 1); | 64 uintptr_t dstart = start & ~(dsize - 1); |
65 uintptr_t istart = start & ~(isize - 1); | 65 uintptr_t istart = start & ~(isize - 1); |
66 uintptr_t end = start + length; | 66 uintptr_t end = start + length; |
67 | 67 |
68 __asm__ __volatile__ ( // NOLINT | 68 __asm__ __volatile__ ( // NOLINT |
69 // Clean every line of the D cache containing the target data. | 69 // Clean every line of the D cache containing the target data. |
70 "0: \n\t" | 70 "0: \n\t" |
71 // dc : Data Cache maintenance | 71 // dc : Data Cache maintenance |
72 // c : Clean | 72 // c : Clean |
73 // va : by (Virtual) Address | 73 // va : by (Virtual) Address |
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114 // This code does not write to memory but without the dependency gcc might | 114 // This code does not write to memory but without the dependency gcc might |
115 // move this code before the code is generated. | 115 // move this code before the code is generated. |
116 : "cc", "memory" | 116 : "cc", "memory" |
117 ); // NOLINT | 117 ); // NOLINT |
118 #endif | 118 #endif |
119 } | 119 } |
120 | 120 |
121 } } // namespace v8::internal | 121 } } // namespace v8::internal |
122 | 122 |
123 #endif // V8_TARGET_ARCH_ARM64 | 123 #endif // V8_TARGET_ARCH_ARM64 |
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