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Side by Side Diff: src/arm64/constants-arm64.h

Issue 430503007: Rename ASSERT* to DCHECK*. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: REBASE and fixes Created 6 years, 4 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_ARM64_CONSTANTS_ARM64_H_ 5 #ifndef V8_ARM64_CONSTANTS_ARM64_H_
6 #define V8_ARM64_CONSTANTS_ARM64_H_ 6 #define V8_ARM64_CONSTANTS_ARM64_H_
7 7
8 8
9 // Assert that this is an LP64 system. 9 // Assert that this is an LP64 system.
10 STATIC_ASSERT(sizeof(int) == sizeof(int32_t)); // NOLINT(runtime/sizeof) 10 STATIC_ASSERT(sizeof(int) == sizeof(int32_t)); // NOLINT(runtime/sizeof)
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255 lt = 11, 255 lt = 11,
256 gt = 12, 256 gt = 12,
257 le = 13, 257 le = 13,
258 al = 14, 258 al = 14,
259 nv = 15 // Behaves as always/al. 259 nv = 15 // Behaves as always/al.
260 }; 260 };
261 261
262 inline Condition NegateCondition(Condition cond) { 262 inline Condition NegateCondition(Condition cond) {
263 // Conditions al and nv behave identically, as "always true". They can't be 263 // Conditions al and nv behave identically, as "always true". They can't be
264 // inverted, because there is no never condition. 264 // inverted, because there is no never condition.
265 ASSERT((cond != al) && (cond != nv)); 265 DCHECK((cond != al) && (cond != nv));
266 return static_cast<Condition>(cond ^ 1); 266 return static_cast<Condition>(cond ^ 1);
267 } 267 }
268 268
269 // Commute a condition such that {a cond b == b cond' a}. 269 // Commute a condition such that {a cond b == b cond' a}.
270 inline Condition CommuteCondition(Condition cond) { 270 inline Condition CommuteCondition(Condition cond) {
271 switch (cond) { 271 switch (cond) {
272 case lo: 272 case lo:
273 return hi; 273 return hi;
274 case hi: 274 case hi:
275 return lo; 275 return lo;
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393 // These are the masks that define a class of instructions, and the list of 393 // These are the masks that define a class of instructions, and the list of
394 // instructions within each class. Each enumeration has a Fixed, FMask and 394 // instructions within each class. Each enumeration has a Fixed, FMask and
395 // Mask value. 395 // Mask value.
396 // 396 //
397 // Fixed: The fixed bits in this instruction class. 397 // Fixed: The fixed bits in this instruction class.
398 // FMask: The mask used to extract the fixed bits in the class. 398 // FMask: The mask used to extract the fixed bits in the class.
399 // Mask: The mask used to identify the instructions within a class. 399 // Mask: The mask used to identify the instructions within a class.
400 // 400 //
401 // The enumerations can be used like this: 401 // The enumerations can be used like this:
402 // 402 //
403 // ASSERT(instr->Mask(PCRelAddressingFMask) == PCRelAddressingFixed); 403 // DCHECK(instr->Mask(PCRelAddressingFMask) == PCRelAddressingFixed);
404 // switch(instr->Mask(PCRelAddressingMask)) { 404 // switch(instr->Mask(PCRelAddressingMask)) {
405 // case ADR: Format("adr 'Xd, 'AddrPCRelByte"); break; 405 // case ADR: Format("adr 'Xd, 'AddrPCRelByte"); break;
406 // case ADRP: Format("adrp 'Xd, 'AddrPCRelPage"); break; 406 // case ADRP: Format("adrp 'Xd, 'AddrPCRelPage"); break;
407 // default: printf("Unknown instruction\n"); 407 // default: printf("Unknown instruction\n");
408 // } 408 // }
409 409
410 410
411 // Generic fields. 411 // Generic fields.
412 enum GenericInstrField { 412 enum GenericInstrField {
413 SixtyFourBits = 0x80000000, 413 SixtyFourBits = 0x80000000,
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1243 }; 1243 };
1244 1244
1245 enum UnallocatedOp { 1245 enum UnallocatedOp {
1246 UnallocatedFixed = 0x00000000, 1246 UnallocatedFixed = 0x00000000,
1247 UnallocatedFMask = 0x00000000 1247 UnallocatedFMask = 0x00000000
1248 }; 1248 };
1249 1249
1250 } } // namespace v8::internal 1250 } } // namespace v8::internal
1251 1251
1252 #endif // V8_ARM64_CONSTANTS_ARM64_H_ 1252 #endif // V8_ARM64_CONSTANTS_ARM64_H_
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