Rename ASSERT* to DCHECK*.

src/arm64/codegen-arm64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/v8.h"
 
 #if V8_TARGET_ARCH_ARM64
 
 #include "src/arm64/simulator-arm64.h"
 #include "src/codegen.h"
@@ skipping 44 matching lines @@
 
   MathExpGenerator::EmitMathExp(&masm, input, result,
                                 double_temp1, double_temp2,
                                 temp1, temp2, temp3);
   // Move the result to the return register.
   masm.Fmov(d0, result);
   masm.Ret();
 
   CodeDesc desc;
   masm.GetCode(&desc);
-  ASSERT(!RelocInfo::RequiresRelocation(desc));
+  DCHECK(!RelocInfo::RequiresRelocation(desc));
 
   CpuFeatures::FlushICache(buffer, actual_size);
   base::OS::ProtectCode(buffer, actual_size);
 
 #if !defined(USE_SIMULATOR)
   return FUNCTION_CAST<UnaryMathFunction>(buffer);
 #else
   fast_exp_arm64_machine_code = buffer;
   return &fast_exp_simulator;
 #endif
 }
 
 
 UnaryMathFunction CreateSqrtFunction() {
   return &std::sqrt;
 }
 
 
 // -------------------------------------------------------------------------
 // Platform-specific RuntimeCallHelper functions.
 
 void StubRuntimeCallHelper::BeforeCall(MacroAssembler* masm) const {
   masm->EnterFrame(StackFrame::INTERNAL);
-  ASSERT(!masm->has_frame());
+  DCHECK(!masm->has_frame());
   masm->set_has_frame(true);
 }
 
 
 void StubRuntimeCallHelper::AfterCall(MacroAssembler* masm) const {
   masm->LeaveFrame(StackFrame::INTERNAL);
-  ASSERT(masm->has_frame());
+  DCHECK(masm->has_frame());
   masm->set_has_frame(false);
 }
 
 
 // -------------------------------------------------------------------------
 // Code generators
 
 void ElementsTransitionGenerator::GenerateMapChangeElementsTransition(
     MacroAssembler* masm,
     Register receiver,
     Register key,
     Register value,
     Register target_map,
     AllocationSiteMode mode,
     Label* allocation_memento_found) {
   ASM_LOCATION(
       "ElementsTransitionGenerator::GenerateMapChangeElementsTransition");
-  ASSERT(!AreAliased(receiver, key, value, target_map));
+  DCHECK(!AreAliased(receiver, key, value, target_map));
 
   if (mode == TRACK_ALLOCATION_SITE) {
-    ASSERT(allocation_memento_found != NULL);
+    DCHECK(allocation_memento_found != NULL);
     __ JumpIfJSArrayHasAllocationMemento(receiver, x10, x11,
                                          allocation_memento_found);
   }
 
   // Set transitioned map.
   __ Str(target_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
   __ RecordWriteField(receiver,
                       HeapObject::kMapOffset,
                       target_map,
                       x10,
@@ skipping 15 matching lines @@
   ASM_LOCATION("ElementsTransitionGenerator::GenerateSmiToDouble");
   Label gc_required, only_change_map;
   Register elements = x4;
   Register length = x5;
   Register array_size = x6;
   Register array = x7;
 
   Register scratch = x6;
 
   // Verify input registers don't conflict with locals.
-  ASSERT(!AreAliased(receiver, key, value, target_map,
+  DCHECK(!AreAliased(receiver, key, value, target_map,
                      elements, length, array_size, array));
 
   if (mode == TRACK_ALLOCATION_SITE) {
     __ JumpIfJSArrayHasAllocationMemento(receiver, x10, x11, fail);
   }
 
   // Check for empty arrays, which only require a map transition and no changes
   // to the backing store.
   __ Ldr(elements, FieldMemOperand(receiver, JSObject::kElementsOffset));
   __ JumpIfRoot(elements, Heap::kEmptyFixedArrayRootIndex, &only_change_map);
@@ skipping 82 matching lines @@
     Register target_map,
     AllocationSiteMode mode,
     Label* fail) {
   ASM_LOCATION("ElementsTransitionGenerator::GenerateDoubleToObject");
   Register elements = x4;
   Register array_size = x6;
   Register array = x7;
   Register length = x5;
 
   // Verify input registers don't conflict with locals.
-  ASSERT(!AreAliased(receiver, key, value, target_map,
+  DCHECK(!AreAliased(receiver, key, value, target_map,
                      elements, array_size, array, length));
 
   if (mode == TRACK_ALLOCATION_SITE) {
     __ JumpIfJSArrayHasAllocationMemento(receiver, x10, x11, fail);
   }
 
   // Check for empty arrays, which only require a map transition and no changes
   // to the backing store.
   Label only_change_map;
 
@@ skipping 82 matching lines @@
 
   __ Bind(&only_change_map);
   __ Str(target_map, FieldMemOperand(receiver, HeapObject::kMapOffset));
   __ RecordWriteField(receiver, HeapObject::kMapOffset, target_map, x13,
                       kLRHasNotBeenSaved, kDontSaveFPRegs, OMIT_REMEMBERED_SET,
                       OMIT_SMI_CHECK);
 }
 
 
 CodeAgingHelper::CodeAgingHelper() {
-  ASSERT(young_sequence_.length() == kNoCodeAgeSequenceLength);
+  DCHECK(young_sequence_.length() == kNoCodeAgeSequenceLength);
   // The sequence of instructions that is patched out for aging code is the
   // following boilerplate stack-building prologue that is found both in
   // FUNCTION and OPTIMIZED_FUNCTION code:
   PatchingAssembler patcher(young_sequence_.start(),
                             young_sequence_.length() / kInstructionSize);
   // The young sequence is the frame setup code for FUNCTION code types. It is
   // generated by FullCodeGenerator::Generate.
   MacroAssembler::EmitFrameSetupForCodeAgePatching(&patcher);
 
 #ifdef DEBUG
   const int length = kCodeAgeStubEntryOffset / kInstructionSize;
-  ASSERT(old_sequence_.length() >= kCodeAgeStubEntryOffset);
+  DCHECK(old_sequence_.length() >= kCodeAgeStubEntryOffset);
   PatchingAssembler patcher_old(old_sequence_.start(), length);
   MacroAssembler::EmitCodeAgeSequence(&patcher_old, NULL);
 #endif
 }
 
 
 #ifdef DEBUG
 bool CodeAgingHelper::IsOld(byte* candidate) const {
   return memcmp(candidate, old_sequence_.start(), kCodeAgeStubEntryOffset) == 0;
 }
@@ skipping 31 matching lines @@
     MacroAssembler::EmitCodeAgeSequence(&patcher, stub);
   }
 }
 
 
 void StringCharLoadGenerator::Generate(MacroAssembler* masm,
                                        Register string,
                                        Register index,
                                        Register result,
                                        Label* call_runtime) {
-  ASSERT(string.Is64Bits() && index.Is32Bits() && result.Is64Bits());
+  DCHECK(string.Is64Bits() && index.Is32Bits() && result.Is64Bits());
   // Fetch the instance type of the receiver into result register.
   __ Ldr(result, FieldMemOperand(string, HeapObject::kMapOffset));
   __ Ldrb(result, FieldMemOperand(result, Map::kInstanceTypeOffset));
 
   // We need special handling for indirect strings.
   Label check_sequential;
   __ TestAndBranchIfAllClear(result, kIsIndirectStringMask, &check_sequential);
 
   // Dispatch on the indirect string shape: slice or cons.
   Label cons_string;
@@ skipping 75 matching lines @@
                                    DoubleRegister result,
                                    DoubleRegister double_temp1,
                                    DoubleRegister double_temp2,
                                    Register temp1,
                                    Register temp2,
                                    Register temp3) {
   // TODO(jbramley): There are several instances where fnmsub could be used
   // instead of fmul and fsub. Doing this changes the result, but since this is
   // an estimation anyway, does it matter?
 
-  ASSERT(!AreAliased(input, result,
+  DCHECK(!AreAliased(input, result,
                      double_temp1, double_temp2,
                      temp1, temp2, temp3));
-  ASSERT(ExternalReference::math_exp_constants(0).address() != NULL);
+  DCHECK(ExternalReference::math_exp_constants(0).address() != NULL);
 
   Label done;
   DoubleRegister double_temp3 = result;
   Register constants = temp3;
 
   // The algorithm used relies on some magic constants which are initialized in
   // ExternalReference::InitializeMathExpData().
 
   // Load the address of the start of the array.
   __ Mov(constants, ExternalReference::math_exp_constants(0));
 
   // We have to do a four-way split here:
   //  - If input <= about -708.4, the output always rounds to zero.
   //  - If input >= about 709.8, the output always rounds to +infinity.
   //  - If the input is NaN, the output is NaN.
   //  - Otherwise, the result needs to be calculated.
   Label result_is_finite_non_zero;
   // Assert that we can load offset 0 (the small input threshold) and offset 1
   // (the large input threshold) with a single ldp.
-  ASSERT(kDRegSize == (ExpConstant(constants, 1).offset() -
+  DCHECK(kDRegSize == (ExpConstant(constants, 1).offset() -
                               ExpConstant(constants, 0).offset()));
   __ Ldp(double_temp1, double_temp2, ExpConstant(constants, 0));
 
   __ Fcmp(input, double_temp1);
   __ Fccmp(input, double_temp2, NoFlag, hi);
   // At this point, the condition flags can be in one of five states:
   //  NZCV
   //  1000      -708.4 < input < 709.8    result = exp(input)
   //  0110      input == 709.8            result = +infinity
   //  0010      input > 709.8             result = +infinity
   //  0011      input is NaN              result = input
   //  0000      input <= -708.4           result = +0.0
 
   // Continue the common case first. 'mi' tests N == 1.
   __ B(&result_is_finite_non_zero, mi);
 
   // TODO(jbramley): Consider adding a +infinity register for ARM64.
   __ Ldr(double_temp2, ExpConstant(constants, 2));    // Synthesize +infinity.
 
   // Select between +0.0 and +infinity. 'lo' tests C == 0.
   __ Fcsel(result, fp_zero, double_temp2, lo);
   // Select between {+0.0 or +infinity} and input. 'vc' tests V == 0.
   __ Fcsel(result, result, input, vc);
   __ B(&done);
 
   // The rest is magic, as described in InitializeMathExpData().
   __ Bind(&result_is_finite_non_zero);
 
   // Assert that we can load offset 3 and offset 4 with a single ldp.
-  ASSERT(kDRegSize == (ExpConstant(constants, 4).offset() -
+  DCHECK(kDRegSize == (ExpConstant(constants, 4).offset() -
                               ExpConstant(constants, 3).offset()));
   __ Ldp(double_temp1, double_temp3, ExpConstant(constants, 3));
   __ Fmadd(double_temp1, double_temp1, input, double_temp3);
   __ Fmov(temp2.W(), double_temp1.S());
   __ Fsub(double_temp1, double_temp1, double_temp3);
 
   // Assert that we can load offset 5 and offset 6 with a single ldp.
-  ASSERT(kDRegSize == (ExpConstant(constants, 6).offset() -
+  DCHECK(kDRegSize == (ExpConstant(constants, 6).offset() -
                               ExpConstant(constants, 5).offset()));
   __ Ldp(double_temp2, double_temp3, ExpConstant(constants, 5));
   // TODO(jbramley): Consider using Fnmsub here.
   __ Fmul(double_temp1, double_temp1, double_temp2);
   __ Fsub(double_temp1, double_temp1, input);
 
   __ Fmul(double_temp2, double_temp1, double_temp1);
   __ Fsub(double_temp3, double_temp3, double_temp1);
   __ Fmul(double_temp3, double_temp3, double_temp2);
 
@@ skipping 25 matching lines @@
   __ Fmul(result, double_temp3, double_temp1);
 
   __ Bind(&done);
 }
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_ARM64